特長
- CPU outputs cycle-cycle jitter < 85ps
- SRC output cycle-cycle jitter < 125ps
- PCI outputs cycle-cycle jitter < 250ps
- ± 100ppm frequency accuracy on CPU and SRC clocks
- Does not require an external pass transistor for the voltage regulator
- Integrated 33Ω series resistors on differential outputs, Zo = 50Ω
- Supports spread spectrum modulation, default is 0.5% down spread
- Uses external 14.318MHz crystal, external crystal load caps are required for frequency tuning
- Selectable between one SRC differential push-pull pair and two single-ended outputs
- Meets PCIEX Gen2 specification on dedicated SRC outputs.
- Muxed SRC outputs meet PCIEX Gen1 specification, except SRC1.
- Single-ended programmable slew rate control for RFI reduction
- Meets PCIEX <85ps cycle-to-cycle jitter for SRC[11:1]
- Available in commercial and industrial temperature ranges
9LRS3165B - Block Diagram
説明
The 9LRS3165 is a CK505-compatible clock with fully integrated voltage regulator and internal series resistor on differential outputs.
Output Features:
- 2 - CPU differential low-power push-pull pairs
- 9 - SRC differential low-power push-pull pairs
- 1 - CPU/SRC selectable differential low-power push-pull pair
- 1 - SRC/DOT selectable differential low-power push-pull pair
- 5 - PCI, 33MHz
- 1 - PCI_F, 33MHz free running
- 1 - USB, 48MHz
- 1 - REF, 14.318MHz
