特長
- Fourth Generation FemtoClock® NG PLL technology
- Eight outputs selectable as LVPECL or LVDS
- Input selectable: fundamental mode crystal or clock reference
- Supports fundamental mode crystals from 10MHz - 40MHz
- CLK, nCLK input pair can accept the following differential input levels: LVPECL, LVDS, HCSL
- Input frequencies from 5MHz up to 800MHz
- Two independent output frequencies can be generated
- Output frequencies independent of each other and of input
- Output frequencies from 15.5MHz - 650MHz, and 975MHz - 1300MHz
- RMS phase jitter at 125MHz (12kHz - 20MHz): 0.282ps (typical)
- RMS phase jitter at 156.25MHz (12kHz - 20MHz): 0.278ps (typical)
- Full 2.5V or 3.3V power supply
- I2C programming interface
- -40°C to 85°C ambient operating temperature
- Lead-free (RoHS 6) packaging
- VCC / VCCA / VCCO
- 3.3V / 3.3V / 3.3V
- 3.3V / 3.3V / 2.5V (LVPECL only)
- 2.5V / 2.5V / 2.5V
- 4-output (8T49N004I) 6-output (8T49N006I) and 8-output (8T49N008I) with Integer Output Divider also available
説明
The 8T49N524I is an eight output programmable any-rate dual clock generator with selectable LVDS or LVPECL outputs. Both clock generators use Fractional Output Dividers to be able to generate output frequencies that are independent of each other and independent of the input frequency. Output frequencies for both clock generators are generated from a single crystal or reference clock. Clock Generator A supports three different factory-programmed default frequencies that can be selected from using only the FSEL control pins. Alternatively, any desired output frequency can be programmed over the I2C serial port. The chosen output frequency is then driven out the QA0 to QA3 outputs.
Clock Generator B supports a single factory-programmed default frequency. It can also be programmed for any output frequency via the serial port. The output frequency is driven out the QB0 to QB3 outputs. Please consult Renesas for programming software that can be used to determine the required settings for any desired configuration.
Excellent phase noise performance is achieved with Renesas' fourth Generation FemtoClock® NG PLL technology, which delivers sub-0.5ps RMS phase jitter in the integer divide mode.
