メインコンテンツに移動
LVDS Programmable Delay Line

パッケージ情報

CADモデル:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG32
Lead Count (#):32
Pkg. Dimensions (mm):5.0 x 5.0 x 0.9
Pitch (mm):0.5

環境及び輸出分類情報

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

製品スペック

Lead Count (#)32
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)490
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Accepts Spread Spec InputNo
Core Voltage (V)2.5
Feedback InputNo
FunctionBuffer
Input Freq (MHz)800
Input TypeLVPECL, LVDS, CML
Inputs (#)1
Length (mm)5
MOQ490
Output Banks (#)1
Output Freq Range (MHz)800
Output SignalingLVDS
Output TypeLVDS
Output Voltage (V)2.5
Outputs (#)1
Package Area (mm²)25
Pitch (mm)0.5
Pkg. Dimensions (mm)5.0 x 5.0 x 0.9
Pkg. TypeVFQFPN
Price (USD)$11.23982
Product CategoryClock Buffers & Drivers
Prog. ClockNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)0.9
Width (mm)5
掲載No

説明

The 8S89296 is a high-performance LVDS programmable delay line. The delay can vary from 2.2ns to 12.5ns in 10ps steps. The 8S89296 is characterized to operate from a 2.5V power supply and is guaranteed over the industrial temperature range. The delay of the device varies in discrete steps based on a control word; a 10-bit long control word sets the delay in 10ps increments. Also, the input pins IN and nIN default to an equivalent low state when left floating. The control register can accept CMOS or TTL-level signals.