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LVDS Frequency Translator/Jitter Attenuator

パッケージ情報

Pkg. Type:TSSOP
Pkg. Code:PGG20
Lead Count (#):20
Pkg. Dimensions (mm):6.5 x 4.4 x 1.0
Pitch (mm):0.65

環境及び輸出分類情報

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)1
ECCN (US)
HTS (US)

製品スペック

Pkg. TypeTSSOP
Lead Count (#)20
Pb (Lead) FreeYes
Carrier TypeTube
C-C Jitter Typ P-P (ps)18
Core Voltage (V)3.3
Feedback InputNo
Input Freq (MHz)122.5 - 160
Input TypeLVDS, LVPECL, LVHSTL, SSTL, HCSL
Inputs (#)1
Length (mm)6.5
MOQ74
Moisture Sensitivity Level (MSL)1
Output Banks (#)2
Output Freq Range (MHz)61.25 - 320
Output Skew (ps)55
Output TypeLVDS
Output Voltage (V)3.3
Outputs (#)3
Package Area (mm²)28.6
Pb Free Categorye3 Sn
Period Jitter Typ P-P (ps)2.5
Pitch (mm)0.65
Pkg. Dimensions (mm)6.5 x 4.4 x 1.0
Prog. ClockNo
Qty. per Carrier (#)74
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Temp. Range (°C)-40 to 85°C
Thickness (mm)1
Width (mm)4.4
掲載No

説明

The 874003I-03 is a high performance Differential-to-LVDS Frequency Translator/ Jitter Attenuator designed for use in communication systems. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 874003I-03 has a bandwidth that can easily track triangular spread profiles, while providing good jitter attenuation. The 874003I-03 uses IDT's 3RD Generation FemtoClockTM PLL technology to achieve the lowest possible phase noise. The device is packaged in a 20 Lead TSSOP package, making it ideal for use in space constrained applications.