特長
- Three differential LVDS output pairs
- One differential clock input
- CLK and nCLK supports the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL
- Output frequency range: 61.25MHz - 320MHz
- Input frequency range: 122.5MHz - 160MHz
- VCO range: 490MHz - 640MHz
- Cycle-to-cycle jitter: 18ps (typical)
- 3.3V operating supply
- ?40°C to 85°C ambient operating temperature
- Available in both standard (RoHS 5) and lead-free (RoHS 6) packages
874003I-03 - Block Diagram
説明
The 874003I-03 is a high performance Differential-to-LVDS Frequency Translator/ Jitter Attenuator designed for use in communication systems. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 874003I-03 has a bandwidth that can easily track triangular spread profiles, while providing good jitter attenuation. The 874003I-03 uses IDT's 3RD Generation FemtoClockTM PLL technology to achieve the lowest possible phase noise. The device is packaged in a 20 Lead TSSOP package, making it ideal for use in space constrained applications.
