メインコンテンツに移動
ルネサス エレクトロニクス株式会社 (Renesas Electronics Corporation) - 6月はプライド月間として、LGBTQ+の権利や文化、コミュニティについて啓発する世界的な活動月間です
12:2 Differential-to-LVDS Multiplexer

パッケージ情報

CADモデル:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PRG48
Lead Count (#):48
Pkg. Dimensions (mm):7.0 x 7.0 x 1.4
Pitch (mm):0.5

環境及び輸出分類情報

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

製品スペック

Lead Count (#)48
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)250
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Additive Phase Jitter Typ RMS (fs)160
Additive Phase Jitter Typ RMS (ps)0.16
Core Voltage (V)2.5
FunctionMultiplexer
Input Freq (MHz)3000
Input TypeLVDS, LVPECL, CML
Inputs (#)12
Length (mm)7
MOQ1
Output Banks (#)2
Output Freq Range (MHz)3000
Output Skew (ps)25
Output TypeLVDS
Output Voltage (V)2.5
Outputs (#)2
Package Area (mm²)49
Pitch (mm)0.5
Pkg. Dimensions (mm)7.0 x 7.0 x 1.4
Pkg. TypeTQFP
Product CategoryClock Multiplexers
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1.4
Width (mm)7

説明

The ICS854S202I-01 is a 12:2 Differential-to-LVDS Clock Multiplexer which can operate up to 3GHz. The ICS854S202I-01 has twelve selectable differential clock inputs, any of which can be independently routed to either of the two LVDS outputs. The CLKx, nCLKx input pairs can accept LVPECL, LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits.