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ルネサス エレクトロニクス株式会社 (Renesas Electronics Corporation) - 6月はプライド月間として、LGBTQ+の権利や文化、コミュニティについて啓発する世界的な活動月間です
Low Skew,1-to-4,LVCMOS/LVTTL-to-LVDS Fanout Buffer

パッケージ情報

CADモデル:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG16
Lead Count (#):16
Pkg. Dimensions (mm):5.0 x 4.4 x 1.0
Pitch (mm):0.65

環境及び輸出分類情報

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

製品スペック

Lead Count (#)16
Carrier TypeReel
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)2500
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Additive Phase Jitter Typ RMS (fs)160
Additive Phase Jitter Typ RMS (ps)0.16
Core Voltage (V)3.3
FunctionBuffer
Input Freq (MHz)250
Input TypeLVCMOS
Inputs (#)1
Length (mm)5
MOQ2500
Output Banks (#)1
Output Freq Range (MHz)250
Output Skew (ps)72
Output TypeLVDS
Output Voltage (V)3.3
Outputs (#)4
Package Area (mm²)22
Pitch (mm)0.65
Pkg. Dimensions (mm)5.0 x 4.4 x 1.0
Pkg. TypeTSSOP
Product CategoryClock Buffers & Drivers
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Thickness (mm)1
Width (mm)4.4

説明

The 854105I is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer. Utilizing Low Voltage Differential Signaling (LVDS), the 854105I provides a low power, low noise solution for distributing clock signals over controlled impedances of 100?. The 854105I accepts an LVCMOS/LVTTL input level and translates it to LVDS output levels. Guaranteed output and part-to-part skew characteristics make the 854105I ideal for those applications demanding well defined performance and repeatability.