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ルネサス エレクトロニクス株式会社 (Renesas Electronics Corporation) - 6月はプライド月間として、LGBTQ+の権利や文化、コミュニティについて啓発する世界的な活動月間です
Low Skew, 1-to-9 Differential-to-LVHSTL Fanout Buffer

パッケージ情報

CADモデル:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PRG32
Lead Count (#):32
Pkg. Dimensions (mm):7.0 x 7.0 x 1.4
Pitch (mm):0.8

環境及び輸出分類情報

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

製品スペック

Lead Count (#)32
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)250
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Core Voltage (V)3.3
FunctionBuffer, Multiplexer
Input Freq (MHz)500
Input TypeHCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#)2
Length (mm)7
MOQ250
Output Banks (#)1
Output Freq Range (MHz)500
Output Skew (ps)50
Output TypeHSTL
Output Voltage (V)1.8
Outputs (#)9
Package Area (mm²)49
Pitch (mm)0.8
Pkg. Dimensions (mm)7.0 x 7.0 x 1.4
Pkg. TypeTQFP
Product CategoryClock Buffers & Drivers
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1.4
Width (mm)7

説明

The 8521I-03 is a low skew, 1-to-9 differential-to-LVHSTL fanout buffer. The device has two selectable clock inputs. Redundant clock pairs, CLK0, nCLK0 and CLK1, nCLK1 can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/de-assertion of the clock enable pin.

Guaranteed output skew and part-to-part skew characteristics make the 8521I-03 ideal for today’s most advanced applications, such as IA64 and static RAMs.