特長
- 7 LVDS differential output at 125MHz
- 1 LVCMOS/LVTTL single-ended outputs at 125MHz
- Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended input and PLL bypass from a single select pin
- Output enable signal for three LVDS outputs
- RMS phase jitter @ 125MHz, using a 25MHz crystal
- (1.857MHz - 20MHz): 0.278ps (typical)
- PCI Express (2.5Gb/s) and Gen 2 (5 Gb/s) jitter compliant
- Full 3.3V supply mode
- 0°C to 70°C ambient operating temperature
- Available in lead-free (RoHS 6) package
844S0258-07 - Block Diagram
説明
The 844S0258-07 is an eight output synthesizer optimized to generate Gigabit and 10 Gigabit Ethernet clocks. Using a 25MHz, 18pF parallel resonant crystal, the device will generate 125MHz clocks with mixed LVDS and LVCMOS/ LVTTL output levels. 844S0258-07 uses IDT's 3rd generation low phase noise VCO technology and can achieve <1ps typical RMS phase jitter, easily meeting Ethernet jitter requirements. 844S0258-07 is packaged in a small, 32-pin VFQFN package that is optimum for applications with space limitations.
