特長
- Twenty-four LVCMOS/LVTTL outputs, 7Ω typical output impedance
- Two selectable differential clock input pairs for redundant clock applications
- CLKx, nCLKx pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
- Maximum output frequency: 100MHz
- Translates any single-ended input signal to LVCMOS/LVTTL with resistor bias on nCLK input
- Multiple output enable pins for disabling unused outputs in reduced fanout applications
- Output skew: 275ps (maximum)
- Part-to-part skew: 600ps (maximum)
- Bank skew: 150ps (maximum)
- Supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V - -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
説明
The 8344I is a low voltage, low skew fanout buffer and a member of the family of High Performance Clock Solutions from IDT. The 8344I has two selectable clock inputs. The CLK0, nCLK0 and CLK1, nCLK1 pairs can accept most standard differential input levels. The 8344I is designed to translate any differential signal levels to LVCMOS/LVTTL levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased to 48 by utilizing the ability of the outputs to drive two series terminated lines. Redundant clock applications can make use of the dual clock input. The dual clock inputs also facilitate board level testing. 8344I is characterized at full 3.3V, full 2.5V and mixed 3.3V input and 2.5V output operating supply modes.
Guaranteed output and part-to-part skew characteristics make the 8344I ideal for those clock distribution applications demanding well defined performance and repeatability.
