特長
- Third generation FemtoClock technology
- Selectable 122.88MHz or 153.6MHz output clock synthesized from a 30.72MHz fundamental mode crystal
- Eight differential LVDS clock outputs
- Differential reference clock input pair
- PLL lock indicator output
- Crystal interface designed for a 30.72MHz, parallel resonant crystal
- RMS phase jitter @ 122.88MHz, using a 30.72MHz crystal (12kHz - 20MHz): 0.650ps (typical)
- RMS phase jitter @ 153.6MHz, using a 30.72MHz crystal (12kHz - 20MHz): 0.642ps (typical)
- LVCMOS interface levels for the control input
- Full 3.3V supply voltage
- Available in Lead-free (RoHS 6) 48-lead VFQFN package
- -40°C to 85°C ambient operating temperature
説明
The 814S208I is an eight LVDS output clock synthesizer designed for wireless infrastructure applications. The device generates eight copies of a selectable 122.88MHz or 153.6MHz clock signal with excellent phase jitter performance. The PLL is optimized for a reference frequency of 30.72MHz. Both a crystal interface and a differential system clock input are supported for the reference frequency. An extra LVDS output duplicates the reference frequency and is provided for clock tree cascading. The device uses Renesas' third generation FemtoClock® technology for an optimum of high clock frequency and low phase noise performance, combined with a low power consumption. A PLL lock status output is provided for monitoring and diagnosis purpose. The device supports a 3.3V voltage supply and is packaged in a small, lead-free (RoHS 6) 48-lead VFQFN package. The extended temperature range supports wireless infrastructure, telecommunication and networking end equipment requirements.
