特長
- A and C speeds
- High-speed, low-power CMOS
- Typical tSK(o) (Output Skew) < 250ps
- Low input and output leakage ? 1 uA (max.)
- ESD > 2000V per MIL-STD-883, Method 3015
- > 200V using machine model (C = 200pF, R = 0)
- Balanced Output Drivers (±24mA)
- Reduced system switching noise
- Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25C
- Available in 56 pin SSOP and TSSOP packages
説明
The 74FCT162501T 18-bit high-speed, low-power registered transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. The 74FCT162501T offers low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors. It is a plug-in replacement for the 74FCT16501T for on-board bus interface applications. The 74FCT162501T operates at -40C to +85C