パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | PLCC |
| Pkg. Code: | PL32 |
| Lead Count (#): | 32 |
| Pkg. Dimensions (mm): | 13.97 x 11.43 x 2.79 |
| Pitch (mm): | 1.27 |
環境及び輸出分類情報
| Pb (Lead) Free | No |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
製品スペック
| Lead Count (#) | 32 |
| Pb (Lead) Free | No |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 3 |
| Architecture | Uni-directional |
| Bus Width (bits) | 9 |
| Core Voltage (V) | 3.3 |
| Density (Kb) | 9 |
| Family Name | SyncFIFO |
| I/O Frequency (MHz) | 100 - 100 |
| I/O Type | 3.3 V LVTTL |
| Interface | Synchronous |
| Length (mm) | 13.97 |
| MOQ | 256 |
| Organization | 1K x 9 |
| Package Area (mm²) | 159.7 |
| Pb Free Category | e0 |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 13.97 x 11.43 x 2.79 |
| Pkg. Type | PLCC |
| Qty. per Carrier (#) | 32 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 2.79 |
| Width (mm) | 11.43 |
| 掲載 | No |
72V221 に関するリソース
説明
The 72V221 is a 1K x 9 First-In, First-Out (FIFO) memory with clocked read and write controls. It is a 3.3V version of the 72221 device and is applicable for a wide variety of data buffering needs such as graphics, local area networks, and interprocessor communication. It has 9-bit input and output ports. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronously of one another for dual clock operation.