概要
説明
The 723644 is a CMOS bidirectional synchronous (clocked) FIFO. Two independent 1K x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.
特長
- Clock frequencies up to 83 MHz (8 ns access time)
- Two independent clocked FIFOs buffering data in opposite directions
- Programmable Almost-Empty and Almost-Full flags
- Serial or parallel programming of partial flags
- Port B bus sizing of 36-bits (long word), 18-bits (word) and 9-bits (byte)
- Big- or Little-Endian format for word and byte bus sizes
- Mailbox bypass registers for each FIFO
- Free-running CLKA and CLKB may be asynchronous or coincident
- Auto power down minimizes power dissipation
- Available 128-pin TQFP package
- Industrial temperature range (–40C to +85C) is available
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