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3.3V 32K x 32 Synchronous PipeLined Burst SRAM

パッケージ情報

CADモデル: View CAD Model
Pkg. Type: TQFP
Pkg. Code: PKG100
Lead Count (#): 100
Pkg. Dimensions (mm): 20.0 x 14.0 x 1.4
Pitch (mm): 0.65

環境及び輸出分類情報

Pb (Lead) Free Yes
ECCN (US) 3A991.b.2.a
HTS (US) 8542.32.0041
Moisture Sensitivity Level (MSL) 3

製品スペック

Lead Count (#) 100
Pb (Lead) Free Yes
Carrier Type Reel
Architecture Synch Burst
Bus Width (bits) 32
Core Voltage (V) 3.3
Density (Kb) 1024
I/O Voltage (V) 3.3 - 3.3
Length (mm) 20
MOQ 1000
Moisture Sensitivity Level (MSL) 3
Organization 32K x 32
Output Type Pipelined
Package Area (mm²) 280
Pb Free Category e3 Sn
Pitch (mm) 0.65
Pkg. Dimensions (mm) 20.0 x 14.0 x 1.4
Pkg. Type TQFP
Qty. per Carrier (#) 0
Qty. per Reel (#) 1000
Reel Size (in) 13
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel Yes
Temp. Range (°C) 0 to 70°C
Thickness (mm) 1.4
Width (mm) 14
掲載 No

説明

The 71V432 3.3V CMOS high-speed CacheRAM is organized as 32K x 32. The pipelined burst architecture provides cost effective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The 71V432 CacheRAM contains write, data, address, and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the CacheRAM.