5P49V5908

特長

Generates up to four independent output frequencies with a total of 11 differential outputs and one reference LVCMOS output
Supports multiple differential output I/O standards:
- Three universal output pairs with each configurable as one differential output pair (LVDS, LVPECL, or regular HCSL) or two LVCMOS outputs. The frequency of each output pair can be individually programmed
- Eight copies of Low Power HCSL (LP-HCSL) outputs
Meets PCIe^® Gen 1/2/3, USB 3.0, 1/10 GbE clock requirements
<0.7 ps RMS typical phase jitter on outputs
Four fractional output dividers (FODs)
Independent spread spectrum capability from each fractional output divider
Stores 4 different configurations in OTP non-volatile memory
Input frequency ranges up to 200MHz
Output frequency ranges up to 350MHz
Programmable loop bandwidth and crystal load capacitance
1.8V/2.5V/3.3V core and output voltages
Supported by the Timing Commander™ software tool

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Programmable Clock Generator with PCIe Timing Outputs by IDT

5P49V5908 Block Diagram

説明

The 5P49V5908 is a programmable clock generator intended for high-performance consumer, networking, industrial, computing, and data communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using the I²C interface. This is Renesas' fifth generation of programmable clock technology (VersaClock^® 5). The frequencies are generated from a single reference clock or crystal.

Two select pins allow up to four different configurations to be programmed and accessible using processor GPIOs or bootstrapping. The different selections may be used for different operating modes (full function, partial function, and partial power down), regional standards (US, Japan, Europe), or system production margin testing. The device may be configured to use one of two I²C addresses to allow multiple devices to be used in a system. The device is packaged in a 48-pin 6mm x 6mm VFQFPN (NDG48), with an industrial operating temperature of -40 °C to +85 °C.

アプリケーション

Ethernet switch/router
PCI Express 1.0/2.0/3.0
Broadcast video/audio timing
Multi-function printer
Processor and FPGA clocking
Any-frequency clock conversion
MSAN/DSLAM/PON
Fiber Channel, SAN
Telecom line cards
1GbE and 10GbE

Part Number	Status	Samples	Stock	Package	Budgetary Price (USD)	Lead Count (#)	Carrier Type	Moisture Sensitivity Level (MSL)	Qty. per Reel (#)	Qty. per Carrier (#)	Pb (Lead) Free	Pb Free Category	Temp. Range (°C)	Country of Assembly	Country of Wafer Fabrication
5P49V5908A000NDGI	NRND	Available	Out of Stock	VFQFPN		48#	Tray	3	0	490#	Yes	e3 Sn	-40 to 85°C
5P49V5908A000NDGI8	NRND	N/A	Out of Stock	VFQFPN		48#	Reel	3	2500#	0	Yes	e3 Sn	-40 to 85°C
5P49V5908B000NDGI	NRND	Available	In Stock	VFQFPN	1ku \| $6.84	48#	Tray	3	0	490#	Yes	e3 Sn	-40 to 85°C	TAIWAN, THAILAND	SINGAPORE, TAIWAN
5P49V5908B000NDGI8	NRND	N/A	Out of Stock	VFQFPN	1ku \| $6.84	48#	Reel	3	2500#	0	Yes	e3 Sn	-40 to 85°C	TAIWAN, THAILAND	SINGAPORE, TAIWAN

読込中

フィルター

推奨ドキュメント (1)

データシート
英語
5P49V5908 Datasheet
RECOMMENDED
PDF 526 KB 7WDXRDKU4E7E-5-59114 2017年3月10日

データシート (1)

データシート
英語
5P49V5908 Datasheet
RECOMMENDED
PDF 526 KB 7WDXRDKU4E7E-5-59114 2017年3月10日

マニュアル、ガイド (2)

マニュアル－開発ツール
英語
VersaClock 5 Family Register Descriptions and Programming Guide
PDF 1.25 MB 7WDXRDKU4E7E-5-57450 2023年2月02日
マニュアル－ソフトウェア
英語
VersaClock 5 Timing Commander Users Guide
PDF 2.04 MB 7WDXRDKU4E7E-5-57026 2015年10月07日

アプリケーションノート、ホワイトペーパー (16)

アプリケーションノート
英語
PCB Layout Considerations for VersaClock Clock Generator Family
PDF 1.09 MB R31AN0026EU0102 Rev.1.02 2025年9月06日
アプリケーションノート
英語
Termination Options for High-Speed LVCMOS Driver Clock Drivers
PDF 187 KB R31AN0065EU0101 Rev.1.01 2023年11月14日
アプリケーションノート
英語
Timing Commander Installation Guide
PDF 348 KB R31AN0040EU0100 Rev.1.00 2023年3月10日
アプリケーションノート
英語
AN-1014 Microstrip vs Stripline: Crosstalk and RMS Phase Jitter
PDF 486 KB 7WDXRDKU4E7E-5-63374 2018年11月01日
アプリケーションノート
英語
AN-975 Cascading PLLs
PDF 255 KB 7WDXRDKU4E7E-5-61774 2017年8月02日

もっと見る (16)

製品通知（PCN、EOLなど） (3)

製品変更通知
英語
PCN# : 210023 Add Alternate Assembly Locations on Select VFQFN Packages
PDF 726 KB 2021年8月20日
製品変更通知
英語
PCN# : W1602-01 300mm wafer size from 200mm wafer size at Global Foundries
PDF 344 KB 7WDXRDKU4E7E-5-59950 2016年2月20日
製品変更通知
英語
PCN# : MM1510-01 Programming Configuration Change on Versa Clock
PDF 243 KB 7WDXRDKU4E7E-5-59639 2015年10月29日

マーケティング資料 (1)

製品概要
英語
5P49V5907 and 5P49V5908 VersaClock® 5 with Additional PCIe Outputs
PDF 1.01 MB 7WDXRDKU4E7E-6-10379 2015年6月29日

読込中

フィルター

ソフトウェア／ツール (3)

ソフトウェア／ツール－その他
英語
VersaClock 5 Timing Commander Personality File
ログインしてダウンロード TCP 2.94 MB 7WDXRDKU4E7E-5-57028 2015年10月06日
ソフトウェア／ツール－ソフトウェア
英語
Timing Commander Installer (v1.18.2)
ログインしてダウンロード ZIP 18.01 MB 7WDXRDKU4E7E-6-8060 2024年12月02日
コードジェネレータ
日本語
Timing Commander
Timing Commander™は、Windows™ベースの革新的なソフトウェアプラットフォームで、システム設計を行うエンジニアは、直感的かつ柔軟なグラフィカルユーザインタフェース（GUI）により、高度なタイミングデバイスの構成、プログラミング、モニタリングが行えます。

シミュレーションモデル (1)

モデル－IBIS
英語
5P49V5908 IBIS Model
ZIP 408 KB 7WDXRDKU4E7E-5-59111 2015年6月23日

読込中

This video provides an overview of IDT's programmable clock generators 5P49V5907 and 5P49V5908 featuring the fifth generation of programmable clock technology (VersaClock® 5). With additional outputs supporting PCI Express® timing, these devices present a blend of low power, flexibility, and high performance suitable for a wide range of applications including performance consumer, networking, industrial, computing, and data communications. For more information, visit the Programmable Clocks page.

Lab demonstration and clock jitter measurement showing VersaClock 5. The frequency analyzer shows phase jitter at approximately 575 picoseconds RMS. Presented by Baljit Chandhoke, product manager at IDT. For more information visit the Programmable Clocks page.

This video provides an overview of the VersaClock 5 programmable clock generator family, including the 5P49V5901, 5P49V5913, 5P49V5914, 5P49V5923, 5P49V5925, 5P49V5927, 5P49V5929.

The VersaClock 5 family is an in-system programmable clock generator featuring up to four universal output pairs capable of producing independent frequencies up to 350 MHz configurable as HCSL, LVPECL, LVDS, or dual LVCMOS outputs. The highly integrated device consolidates four differential or eight single-ended clock generators and can store up to four different configuration settings, helping to minimize board space and bill-of-materials. Upon request, devices may be factory-programmed to the customer’s desired configuration.

Presented by Baljit Chandhoke, product line manager at IDT. Visit the Programmable Clocks page for more information.

VersaClock® 5 is a low-power programmable clock generator with best-in-class jitter performance with less than 0.7psec RMS phase jitter from 12KHz to 20MHz. The highly integrated device consolidates four differential or eight single-ended clock generators and can store up to four different configuration settings, helping to minimize board space and bill-of-materials. The high-performance clock generator operates at less than 100mW core power (50 percent lower than competing devices), helping to ease system thermal constraints and reduce operating power expenses.

VersaClock 5 can take a crystal or a clock input. It has 4 fractional output dividers which allow the programming of 4 independent frequencies up to 350MHz. The four universal output pairs are independently configurable as HCSL, LVPECL, LVDS, or dual LVCMOS outputs. It also features a reference clock output. The fractional output dividers driving each output pair are easily programmed via I2C while the device is operating in the system, lending itself to system tuning and margin testing. Unlimited in-system reprogramming is possible via I2C, whereas four banks of one-time programmable non-volatile memory provide flexibility for multi-project inventory consolidation or design changes in field or production units. Upon request, devices may be factory-programmed to the customer's desired configuration.

Presented by Baljit Chandhoke, Product Marketing Manager at Integrated Device Technology, Inc.

This is a video introduction and demonstration of the VersaClock 5 Evaluation Board. This device uses Renesas's Timing Commander™ software platform, allowing engineers to configure and program their devices with an intuitive, time-saving graphical user interface (GUI).

The 5P49V5901 is an in-system programmable clock generator featuring four universal output pairs capable of producing independent frequencies up to 350 MHz in various output types. With RMS phase jitter less than 0.7 picoseconds over the full 12 kHz to 20 MHz integration range, the new device meets the stringent jitter requirements of PCI Express® Gen 1/2/3, USB 3.0, and 1G/10G Ethernet. The high-performance clock generator operates at less than 100 mW core power (50 percent lower than competing devices), helping to ease system thermal constraints, reduce operating power expenses, and maximize battery life.

The 5P49V5901's four universal output pairs are each independently configurable as HCSL, LVPECL, LVDS, or dual LVCMOS outputs. The fractional output dividers driving each output pair are easily programmed via I2C while the device is operating in the system, lending itself to system tuning and margin testing. Unlimited in-system reprogramming is possible via I2C, whereas four banks of one-time programmable non-volatile memory provide flexibility for multi-project inventory consolidation or design changes in field or production units. Upon request, devices may be factory-programmed to the customer's desired configuration.

Presented by Shudong Zheng, Sr. Design Engineer at IDT. For more information about Renesas's VersaClock 5, visit our VersaClock5 page.

Description

IDT's innovative support tool, Timing Commander™, expedites development cycles by empowering customers to program sophisticated timing devices with an intuitive and flexible Graphical User Interface. IDT's Timing Commander is a Windows™-based platform designed to serve user-friendly configuration interfaces, known as personalities, for various IDT products and product families. With a few simple clicks, the user is presented with a comprehensive, interactive block diagram offering the ability to modify desired input values, output values, and other configuration settings. The software automatically makes calculations, reports status monitors, and prepares register settings without the need to reference a datasheet. The tool also automatically loads the configuration settings over USB to an IDT evaluation board for immediate application in the circuit. Once the device has been configured and tuned for optimal system performance, the configuration file can be saved for factory-level programming before shipment. For more information about Timing Commander, visit our Timing Commander page.

Renesas's innovative support tool, Timing Commander™, expedites development cycles by empowering customers to program sophisticated timing devices with an intuitive and flexible Graphical User Interface. Renesas's Timing Commander is a Windows™-based platform designed to serve user-friendly configuration interfaces, known as personalities, for various Renesas products and product families. With a few simple clicks, the user is presented with a comprehensive, interactive block diagram offering the ability to modify desired input values, output values, and other configuration settings. The software automatically makes calculations, reports status monitors, and prepares register settings without the need to reference a datasheet. The tool also automatically loads the configuration settings over USB to an Renesas evaluation board for immediate application in the circuit. Once the device has been configured and tuned for optimal system performance, the configuration file can be saved for factory-level programming prior to shipment. Presented by Steven Gutierrez, Senior Product Application Engineer at Renesas.

Resources

Timing Commander

ニュース＆ブログ

ニュース

2015年7月2日

IDT社、PCI Expressタイミング対応の出力を追加したデバイスでVersaClock 5ファミリーを拡大

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VersaClock 5 Low Power Programmable Clock Generator

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