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| CADモデル: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG20 |
| Lead Count (#): | 20 |
| Pkg. Dimensions (mm): | 6.5 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 20 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 74 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Advanced Features | Programmable Clock, Spread Spectrum, Reference Output |
| Core Voltage (V) | 3.3 |
| Family Name | VersaClock |
| Input Freq (MHz) | 3 - 166 |
| Input Type | Crystal, LVCMOS |
| Inputs (#) | 1 |
| Length (mm) | 6.5 |
| MOQ | 148 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 0.314 - 200 |
| Output Skew (ps) | 250 |
| Output Type | LVCMOS |
| Output Voltage (V) | 1.8V, 2.5V, 3.3V |
| Outputs (#) | 6 |
| Package Area (mm²) | 28.6 |
| Period Jitter Typ P-P (ps) | 200 |
| Phase Jitter Typ RMS (fs) | 50000 |
| Phase Jitter Typ RMS (ps) | 50 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 6.5 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Product Category | VersaClock, Programmable Clocks |
| Prog. Clock | Yes |
| Prog. Interface | OTP |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
The 291 field programmable spread spectrum clock synthesizer generates up to six high-quality, high-frequency clock outputs including multiple reference clocks from a low-frequency crystal input. It is designed to replace crystals, crystal oscillators and stand alone spread spectrum devices in most electronic systems. Using IDT's VersaClockTM software to configure PLLs and outputs, the 291 contains a One-Time Programmable (OTP) ROM for field programmability. Programming features include input/output frequencies, spread spectrum amount, eight selectable configuration registers and up to two sets of three low-skew outputs. Each of the two output groups are powered by a separate VDDO voltage. VDDO may vary from 1.8 V to VDD. Using Phase-Locked Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock. It can replace multiple crystals and oscillators, saving board space and cost. The 291 is also available in factory programmed custom versions for high-volume applications.