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3.3V Zero Delay Low Skew Buffer

パッケージ情報

CADモデル: View CAD Model
Pkg. Type: SOIC
Pkg. Code: DCG8
Lead Count (#): 8
Pkg. Dimensions (mm): 4.9 x 3.9 x 1.5
Pitch (mm): 1.27

環境及び輸出分類情報

Moisture Sensitivity Level (MSL) 1
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

製品スペック

Lead Count (#) 8
Carrier Type Tube
Moisture Sensitivity Level (MSL) 1
Qty. per Reel (#) 0
Qty. per Carrier (#) 97
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) 0 to 70°C
Country of Assembly PHILIPPINES, TAIWAN
Country of Wafer Fabrication TAIWAN, USA
C-C Jitter Max P-P (ps) 200
Core Voltage (V) 3.3
Feedback Input No
Input Freq (MHz) 10 - 133
Input Type LVCMOS
Inputs (#) 1
Length (mm) 4.9
MOQ 1552
Output Banks (#) 1
Output Freq Range (MHz) 10 - 133
Output Skew (ps) 250
Output Type LVCMOS
Output Voltage (V) 3.3
Outputs (#) 5
Package Area (mm²) 19.1
Pitch (mm) 1.27
Pkg. Dimensions (mm) 4.9 x 3.9 x 1.5
Pkg. Type SOIC
Prog. Clock No
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Thickness (mm) 1.5
Width (mm) 3.9
掲載 No

説明

The 2305 is a low phase noise, high-speed PLL based, low-skew zero delay buffer. Based on IDT's proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides four low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The 2305 is available in two different versions. The 2305-1 is the base part. The 2305-1H is a high drive version with faster rise and fall times.