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Features

  • Stable operation with 220 pF capacitive load
  • Low input offset voltage and offset voltage ±3 mV (MAX.) ±7 µV/°C (TYP.) temperature drift
  • Very low input bias and offset currents
  • Low noise: en = 19 nV/ √Hz (TYP.)
  • Output short circuit protection
  • High input impedance ... J-FET Input Stage
  • Internal frequency compensation
  • High slew rate: 25 V/ µs (TYP.)

Description

Dual operational amplifier µPC4094 is a high-speed version of the µPC4092. NEC's unique high-speed PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/ µs under voltage-follower conditions without an oscillation problem. Zener-zap resistor trimming in the input stage produces excellent offset voltage and temperature drift characteristics. With AC performance characteristics that are two times better than conventional bi-FET operation amplifiers, the µPC4094 is ideal for fast integrators, active filters, and other high-speed circuit applications.

Parameters

AttributesValue
Channels (#)2
Temp. Range (°C)-20 to +80
Bandwidth (MHz)6
Offset Voltage (Max) (mV)3
IBIAS (nA)0.05
CMRR (dB)100
Rail-to-Rail InputNo
Rail-to-Rail OutputNo
Common Mode Input Voltage Range (V)5 - 16
IS per Amp (mA)5
Single Supply Voltage Range (V)5 - 16
Slew Rate (V/µs)25
VS (Min) (V)5
VS (Max) (V)16
Topology [Rail 1]-
Enable-
Input Offset Voltage Vio (Max) (mV (±))3
Supply Current Icc/Idd (Max) (mA)6.8
Qualification LevelStandard
Simulation Model AvailableSPICE

Package Options

Pkg. TypeLead Count (#)Pitch (mm)
SOP80.65
Part NumberStatusSamplesLongevityStockPackageBudgetary Price (USD)Carrier TypeMoisture Sensitivity Level (MSL)Country of AssemblyCountry of Wafer Fabrication
UPC4094G2-E1-APActiveAvailable2030 MarOut of StockSOP1ku | $0.463Embossed Tape1THAILANDJAPAN
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