Overview
Description
The Intersil ACTS74MS is a radiation hardened Dual D flip-flop with Set(s) and Reset (R). The logic level at data input is transferred to the output during the positive transition of the clock. The Set and Reset are independent from the clock and accomplished by a low level on the appropriate input. The ACTS74MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS logic family. The ACTS74MS is supplied in a 14-lead Ceramic Flatpack (K suffix) or a 14-lead Ceramic Dual-In-Line package (D suffix).
Features
- Devices QML qualified in accordance with MIL-PRF-38535
- Detailed electrical and screening requirements are contained in SMD# 5962-96713 and Renesas' Intersil QM Plan
- 1.25 micron radiation hardened SOS CMOS
- Total dose >300K RAD (Si)
- Single Event Upset (SEU) immunity: <1 x 10-10 errors/bit/day (Typ)
- SEU LET threshold >100 MEV-cm2/mg
- Dose rate upset >1011 RAD (Si)/s, 20ns pulse
- Dose rate survivability >1012 RAD (Si)/s, 20ns pulse
- Latch-up free under any conditions
- Military temperature range -55 °C to +125 °C
- Significant power reduction compared to ALSTTL logic
- DC operating voltage range 4.5V to 5.5V
- Input logic levels
- VIL = 0.8V Max
- VIH = VCC/2 Min
- Input current ≤ 1µA at VOL, VOH
- Fast propagation delay 20ns (Max), 13ns (Typ)
Comparison
Applications
Documentation
Featured Documentation
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| Type | Title | Date |
| Datasheet | PDF 117 KB | |
| Brochure | PDF 5.02 MB | |
| Brochure | PDF 467 KB | |
| Price Increase Notice | PDF 360 KB | |
| Other | ||
| Application Note | PDF 224 KB | |
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Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
| Die Waffle Pack | Not Applicable | 5962F9671302V9A | Yes | None | 100 | -55 to +125°C | Get Samples, |
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