Overview
Description
The RZ/T1 Group has the Arm® Cortex®-R4 Processor with FPU core, which was designed for real-time processing, and is capable of high-speed operation at up to 600 MHz. Furthermore, access does not need to be performed via cache memory, and tightly-coupled memory capable of definitive real-time response processing is built-in, enabling high-speed access from the CPU without passing through the cache memory. RZ/T1 devices that are equipped with a built-in Renesas R-IN engine (“R-IN engine”), an accelerator for industrial Ethernet communications, can perform industrial Ethernet processing without loss of real-time performance by Hardware RTOS (HW-RTOS) RZ/T1 devices that are equipped with a configurable absolute encoder interface are perfectly suited for precision motion control applications. The range of industry standards that are supported by the configurable encoder interface includes EnDat2.2, BiSS®-C, A-format™, Tamagawa and HIPERFACE® DSL.
Features
- CPU: Arm® Cortex®-R4 Processor with FPU, Max. 600MHz
- Industrial Ethernet: EtherCAT, PROFINET, EtherNet/IP etc.
- Memory: Tightly Coupled Memory 544KB(with ECC), Extended SRAM 1MB(with ECC, option)
- Encoder Interface: EnDat2.2, BiSS®-C, A-format™, Tamagawa, HIPERFACE® DSL
- Timer: 32-bit Timer 3ch, 16-bit Timer 30ch, Watchdog Timer 2ch
- PWM: 3-phase PWM Output Function: 3ch
- Analog function: 12-bit A/D Converter Unit0 : 8ch,Unit1 : 16ch
- Package: 320-pin FBGA, 176-pin HLQFP
- Voltage: Core 1.2V, I/O 3.3V
Comparison
Applications
Design & Development
Software & Tools
Software & Tools
Software title
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Software type
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Company
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USB Drivers Device drivers for USB communication using USB interface with built-in microcomputer and USB ASSP
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USB | Renesas |
AP4, Applilet Peripheral I/O driver generator compatible with third-party compilers and GNU compiler (for RZ, V850, RX, RL78, and 78K)
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Code Generator | Renesas |
Code Generator Plug-in Automatic driver generation tool for internal peripheral I/O modules through GUI settings [Standard features for Renesas IDE "e² studio" and CS+] [Support MCU/MPU: RL78, V850, 78K, RX]
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Code Generator | Renesas |
e² studio - information for RZ Family Eclipse-based Renesas integrated development environment (IDE).
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IDE and Coding Tool | Renesas |
HW-RTOS HW-RTOS is a hardware real-time OS.
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Other Hardware | Renesas |
5 items
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Sample Code
Boards & Kits
Renesas Starter Kit+ for RZ/T1
The Renesas Starter Kit+ for RZ/T1 is the perfect starter kit for developers who are new to the RZ/T1. The kit includes an LCD display module, J-LINK Lite debugging emulator, and e2 studio integrated development environment so you can start evaluating the RZ/T1 immediately after opening the box....
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

Product Options
Applied Filters:
Support
Support Communities
Support Communities
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RZ/T1 PDO dynamic mapping problem
1.Previously used TI master +SPI_Ethercat network chip. PDO can be dynamically mapped. 2.Now use Renesas's network code structure. TWINCAT3 feedback PDO can't be dynamically mapped, fixed. 3.Is there any way to solve it? Can it change the structure of the network? (1).TI master ...
Mar 10, 2022 -
Looking for a RZ/T1 R7S910025 sample to control the PHY through the EtherCAT control mdio management interface
Hello, the same HEX file, R7S910025 cannot control phy through EtherCAT control mdio management interface, there is no waveform output, phy working mode cannot be configured normally, R7S910018 is OK, is there any difference between the two models of MPU control, Is there a sample for R7S910025 to control mdio ...
Dec 17, 2021 -
RZ/T1 Group Initial Settings for Microcomputers Incorporating the R-IN Engine project fails to link
Project Link Application note link e2 studio v7.2 GCC Arm Embedded v6.3.1.20170620 I have simply imported the project and attempted to build. Other RZ/T1 sample projects have built without issue. When building either of the projects I get the same linker error: For the ...
Dec 11, 2018
FAQs
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RZ/T1 : Bitwise Access
When controlling one bit with Cortex-R4 in RZ/T1, read-modify-write sequence of instructions are required. In contrast, Cortex-M3 supports Bit-banding. Each bit in a bit-band region is mapped to the corresponding alias region by address unit, and it is possible to control one ...
Apr 20, 2021 -
RZ/T1 Important Notes for the Thumb Instruction Set
... Implement the FIQ/IRQ interrupt handler using ARM instructions. Depending on your tool environment, they could be implemented with C source code declaring a dedicated specifier for an interrupt function. As reference, please refer to our sample program "RZ/T1 Group Initial Settings (r01an2554)" on our web site.
Sep 27, 2017 -
Measurement conditions of DC Characteristics for RZ/T1
The measurement conditions are shown below. typVDD = PLLVDD0 = PLLVDD1 = DVDD_USB = 1.20V,VCCQ33 = AVCC0 = AVCC1 = VREFH0 = VREFH1 = VDD33_USB = 3.3VVSS = PLLVSS0 = PLLVSS1 = AVSS0 = AVSS1 = VREFL0 = VREFL1 = VSS_USB = 0V,Tj = 25 ℃Peripheral functions are supplied with the clock signal and in operation. maxVDD = PLLVDD0 = PLLVDD1 = DVDD_USB = 1 ...
Nov 15, 2019