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RZ/G3S

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General-Purpose Microprocessors with Single-Core Arm Cortex-A55 (1.1GHz) CPU and Dual-Core Cortex-M33 (250MHz) CPU, Supporting Low-Power Mode and PCI Express

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Features

  • Cortex-A55
  • Cortex-M33 (Dual or Single) (one Cortex-M33 has FPU function)
  • DDR4 or LPDDR4 Memory interface
  • PCIe Gen2 1ch
  • USB 2.0 interface 2ch, SD interface 3ch
  • Gigabit Ethernet 2ch
  • CAN interface (CAN FD) 2ch
  • 12-bit ADC 8ch
  • RTC
  • Memory error detection/correction (ECC)
  • Secure boot
  • Secure update
  • Hardware cryptographic IP
  • True Random Number Generator (TRNG)
  • Secure debug
  • Arm TrustZone
  • Tamper detection
  • On-The-Fly Decryption/Encryption (OTFDE)
  • BGA package (14mm x 14mm, 13mm x 13mm)
Find Other Products in RZ 32 & 64-Bit MPUs
RZ/G3S Block Diagram
RZ/G3S Arm-Based 64-bit Low-Power MPUs
RZ/G3S Block Diagram
RZ/G3S Arm-Based 64-bit Low-Power MPUs

Description

The RZ/G3S microprocessor includes an Arm® Cortex®-A55 (1.1GHz) CPU, 16-bit LPDDR4 or DDR4 interface and low-power mode. It also has many interfaces such as PCIe, CAN FD, and 12-bit ADC, making it ideal for applications such as IoT edge applications.

As a software platform for this product, Renesas provides the Verified Linux package, which includes the Linux Kernel, middleware drivers, and basic software for this product. The Verified Linux package is verified and provided by Renesas.

Parameters

AttributesValue
CPU ArchitectureArm
Main CPUCortex-A55 x 1 + Cortex-M33 x 1, Cortex-A55 x 1 + Cortex-M33 x 2
Program Memory (KB)0
RAM (KB)1024
Carrier TypeBulk (Tray), Full Carton (Tray)
Supply Voltage (V)3 - 3.6
I/O Ports82
NPUNo
DRAM I/FDDR4-1600, LPDDR4-1600 (16-bit)
3D GPUNo
Temp. Range (°C)Ta = -40 to +85
Operating Freq (Max) (MHz)1100
Ethernet speed10M/100M/1G
Ethernet (ch)2
EtherCat (ch) (#)0
USB FS (host ch/device ch)( 2 / 2 )
USB HS (host ch/device ch)( 2 / 2 )
USB SS (host ch/device ch)( 0 / 0 )
PCI Express (generation and ch)No, PCIe (Gen.2.0 1Lane) x 1 ch
SCI or UART (ch)2
SPI (ch)5
I2C (#)4
CAN (ch)2
CAN-FD (ch)2
WirelessNo
SDHI (ch)3
High Resolution Output TimerNo
PWM Output (pin#)0
32-Bit Timer (ch)17
16-Bit Timer (ch) (#)8
8-Bit Timer (ch)0
Standby operable timerNo
Asynchronous General Purpose Timer / Interval Timer (ch)0
16-Bit A/D Converter (ch)0
14-Bit A/D Converter (ch)0
12-Bit A/D Converter (ch)8
10-Bit A/D Converter (ch)0
24-Bit Sigma-Delta A/D Converter (ch)0
16-Bit D/A Converter (ch)0
12-Bit D/A Converter (ch)0
10-Bit D/A Converter (ch) (#)0
8-Bit D/A Converter (ch)0
Capacitive Touch Sensing Unit (ch)0
Graphics LCD ControllerNo
MIPI Interfaces (DSI) (ch)0
MIPI Interfaces (CSI) (ch)0
Image CodecNo
Segment LCD ControllerNo
Security & EncryptionNo, Secure boot, AES, RSA, ECC, Hash, TRNG, Arm TrustZone

Package Options

Pkg. TypePkg. Dimensions (mm)Lead Count (#)Pitch (mm)
LFBGA14 x 14 x 1.43590.5
LFBGA13 x 13 x 1.43610.5

Application Block Diagrams

This SoM block diagram is based on an Arm Cortex-A55 and dual Cortex-M33 MPU and consists of a versatile OSM carrier board and a compatible OSM module.
Arm Cortex-A55 & Dual Cortex-M33 MPU OSM SoM
This Arm Cortex-A55 & Dual Cortex-M33 MPU-based SoM simplifies baseboard development, reduces costs, and minimizes design risks.
Single board computer gateway block diagram featuring an MPU with Arm Cortex-A55 core combined with dual Arm Cortex-M33 and a wide set of sensor connectivity options.
Single Board Computer Gateway
SBC gateway with Arm Cortex-A55 and Arm Cortex-M33 cores offers efficient processing, flexibility, and connectivity.

Additional Applications

  • IoT gateway applications

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