Overview
Description
The RC19002 is a 2-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19002 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.
Features
- LP-HCSL outputs eliminate up to 8 terminated resistors
- PCIe Gen 1–7 compliance
- Drive both source-terminated and double-terminated loads
- Selectable 85Ω and 100Ω output impedance
- Open-drain LOS (Loss-Of-Signal) indication output
- Power down tolerance (PDT)
- Flexible startup sequencing (FSS)
- Automatic clock parking (ACP)
- Dedicated OE# pins to control group output
- 3mm × 3mm 20-VFQFPN package
Comparison
Applications
Design & Development
Software & Tools
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

Support
Support Communities
Get quick technical support online from Renesas Engineering Community technical staff.
Support Communities
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Requesting Clarification in Clock Buffer IC
Dear Renesas Team, I have used a clock buffer IC (P/N : RC19002AGNT#BD0 ) in my design. Design Requirement :Input clock : LVDSOutput Clock : HCSL Should I provide the external termination, or termination already provided internally by the IC?
Aug 7, 2025
Videos & Training
The RC family consists of PCIe Gen7 clock buffer and multiplexer solutions, providing the industry's smallest and most compact footprint.