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Description

The R8C/2C Group is supported only for customers who have already adopted these products. The RL78/G14 Group is recommended for new designs.

The R8C/2A Group and R8C/2B Group of single-chip MCUs incorporates the R8C/Tiny Series CPU core, employing sophisticated instructions for a high level of efficiency. With 1Mb of address space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing.

Power consumption is low, and the supported operating modes allow additional power control. These MCUs also use an anti-noise configuration to reduce emissions of electromagnetic noise and are designed to withstand EMI. Integration of many peripheral functions, including multifunction timer and serial interface, reduces the number of system components. Furthermore, the R8C/2B Group has on-chip data flash (1KB × 2 blocks). The difference between the R8C/2A Group and R8C/2B Group is only the presence or absence of data flash. Their peripheral functions are the same.

Applications

  • Electronic Household Appliances
  • Office Equipment
  • Audio Equipment
  • Consumer Equipment
Part NumberStatusSamplesStockRoHSPackageBudgetary Price (USD)Carrier TypeCountry of AssemblyCountry of Wafer Fabrication
R5F212C7SDFP#V2Last Time BuyN/AOut of StockContactLFQFP1ku | $5.26Tray/Embossed tapeCHINAJAPAN
R5F212C7SNFP#V2Last Time BuyN/AIn StockContactLFQFP1ku | $4.89Tray/Embossed tapeCHINAJAPAN
R5F212C8SDFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LFQFPTray/Embossed tape
R5F212C8SNFP#V2Last Time BuyN/AOut of StockContactLFQFP1ku | $5.11Tray/Embossed tapeCHINAJAPAN
R5F212CASDFP#V2ObsoleteN/AOut of StockRoHS:EN
RoHS:JA
LFQFPTray/Embossed tape
R5F212CASNFP#V2Last Time BuyN/AOut of StockContactLFQFP1ku | $5.43Tray/Embossed tapeCHINAJAPAN
R5F212CCSDFP#V2Last Time BuyN/AOut of StockContactLFQFP1ku | $6.03Tray/Embossed tapeCHINAJAPAN
R5F212CCSNFP#V2Last Time BuyN/AIn StockContactLFQFP1ku | $7.23Tray/Embossed tapeCHINAJAPAN

Support Communities

  1. How increse the Data memory in R8c/2c.

    i am using the renesas R8c/2c controller.In my application need to access 10KB data.Now the compiler restict to the 2.5KB only, how incese the data memory, is it possible to use code memory for the data memory.

    Mar 30, 2012
  2. PIn change interrupt feature in R8C/2C series-r5f212ccSDXXXFP

    Hi i m very new to renesas microcontrollers... In the design what i have got.. i need to use the pin feature for interrupt control Gist of my project My microcontroller R5F212ccSDXXXFP is configured to get   some data from accelerometer ADXL345 thru I2c....when an interrupt occurs.. the master being ...

    Mar 10, 2015
  3. Facing Dificulty in capturing the input frequency signal using R8c/2c Controller

    Hi, can any body give me  a suggestion for capturing an input frequency signal in R8c/2C controller .I am using timer Rc for capture,  in isr i write the code like this,     present_value=trcgrd_addr;  arr_capture1[x++]=(present_value+(overflow_count*0x10000)-previous_value);  previous_value ...

    Nov 26, 2009
View All Results from Support Communities (6)

Knowledge Base

  1. (R8C) Are there any hardware precautions for accurate A/D conversion?

    In order to perform A/D conversion, it is necessary to fully charge the internal capacitor, but if the impedance of the A/D conversion target is high, the discharge and charge will take time and the conversion value will not be accurate. For correct A/D ...

    Jun 19, 2006
  2. Can a parallel programmer verify the program in condition the ROM code protect is enabled?

    The ROM code protect is enabled at the first MCU reset after setting the ROM code protect function. If there is no reset after writing the program, the program can be verified. Contact the parallel programmer manufacturer for programmer specifications.

    Dec 26, 2017
  3. What is the reason of reset caused by the watchdog timer?

    The RAM is also initialized in the start-up file (ncrt0.a30). It might need several tens of milliseconds to initialize the RAM because of the low-speed on-chip oscillator clock divided by 8 is automatically selected as the CPU clock after reset. Therefore, please refresh the watchdog timer ...

    Dec 26, 2017
View All Results from Knowledge Base (11)
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