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Features

  • Fully Integrated PLL
  • Up to 200MHz I/O Frequency
  • LVCMOS Outputs
  • Outputs Disable in High Impedance
  • LVPECL Reference Clock Options
  • LQFP Packaging
  • ±50ps Cycle–Cycle Jitter
  • 150ps Output Skews

Description

The MPC961 is a 2.5V or 3.3V compatible, 1:18 PLL based zero delay buffer. With output frequencies of up to 200MHz, output skews of 150ps the device meets the needs of the most demanding clock tree applications.

Part NumberStatusSamplesStockPackageLead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Core Voltage (V)C-C Jitter Max P-P (ps)Input TypeOutput Voltage (V)Qty. per Reel (#)Qty. per Carrier (#)Pb (Lead) FreePb Free CategoryTemp. Range (°C)
MPC961PACObsoleteN/AIn StockTQFP32#Tray32.5V, 3.3V15psLVCMOS2.5V, 3.3V0250#Yese3 Sn0 to 70°C
MPC961PACR2ObsoleteN/AIn StockTQFP32#Reel33.3V, 2.5V50psLVPECL3.3V, 2.5V2000#0Yese3 Sn0 to 70°C
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