| CAD Model: | View CAD Model |
| Pkg. Type: | |
| Pkg. Code: | |
| Lead Count (#): | |
| Pkg. Dimensions (mm): | |
| Pitch (mm): |
| RoHS (HD74LS373RP) | EnglishJapanese |
| Pb (Lead) Free | |
| Moisture Sensitivity Level (MSL) | |
| ECCN (US) | |
| HTS (US) |
| Family Name | HD74LS Series |
| Function | Octal D-type Transparent Latches with Non-inverted 3-state output |
| Function Gr1 | Latch/Flip-Flop/Register |
| Function Gr2 | D type Latch |
| Lead Compliant | N |
| Propagation Delay | 18 ns |
| Temp. Range (°C) | -20 to +75°C |
The HD74LS373, 8-bit register features totem-pole three-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive provide this register with the capacity of being connected directly to and driving the bus lines in a bus-organized system without the need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches are transparent D-type latches, meaning that while the enable (G) is high, the Q outputs will follow the data (D) inputs. When the enable is taken low, the output will be latched at the level of the data that was set up.