Features
- 3 Micron Radiation Hardened SOS CMOS
- Total Dose 200K RAD (Si)
- SEP Effective LET No Upsets: >100 MEV-cm2/mg
- Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
- Dose Rate Survivability: >1 x 1012 RAD (Si)/s
- Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
- Latch-Up Free Under Any Conditions
- Military Temperature Range: -55°C to +125°C
- Significant Power Reduction Compared to LSTTL ICs
- DC Operating Voltage Range: 4.5V to 5.5V
- LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
- Input Current Levels Ii ≤ 5µA at VOL, V
HCTS86MS Functional Diagram
Description
Support is limited to customers who have already adopted these products.
The Intersil HCTS86MS is a Radiation Hardened Quad 2-Input Exclusive OR Gate. A high on any one input exclusively will change the output to a High state. The HCTS86MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS86MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pitch (mm) | Pkg. Dimensions (mm) | Pb (Lead) Free | Pb Free Category | MOQ | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| HCTS86DMSR | Obsolete | N/A | Out of Stock | SBDIP | 14# | Tube | Not Applicable | 2.5mm | 19.0 x 7.4 x 2.41 | Exempt | Gold Plate over compliant Undercoat-e4 | 25 | -55 to +125°C |
| HCTS86KMSR | Obsolete | N/A | Out of Stock | CFP | 14# | Tray | Not Applicable | 1.3mm | 9.8 x 6.5 x 0.00 | Exempt | Gold Plate over compliant Undercoat-e4 | 25 | -55 to +125°C |
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- End Of Life NoticePDF 153 KB PLC11027 Apr 13, 2011
- Product AdvisoryPDF 499 KB PA11003 Jan 05, 2011
- Product Change NoticePDF 230 KB PCN10123 Dec 06, 2010
- Application NotePDF 338 KB an9867 Nov 10, 1999AI-generated Summary: Electrical parameters are monitored during life testing to detect drift and failures, defined by exceeding datasheet limits. New products require less than 1% failure during burn-in, with failure analysis and corrective actions if exceeded. Sampling plans ensure defect rates below 3%. Life tests last 1000-3000 hours at 125°C depending on process maturity. Failure mechanisms include electromigration, ionic contamination, hot carrier injection, and dielectric rupture. Product sign-off requires all parties' approval after reliability confirmation. Space products undergo burn-in and quality conformance inspections with strict failure limits. Derating is unnecessary as datasheet limits are set at 6-sigma from characterization data, ensuring reliability.
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- Application NotePDF 338 KB an9867 Nov 10, 1999AI-generated Summary: Electrical parameters are monitored during life testing to detect drift and failures, defined by exceeding datasheet limits. New products require less than 1% failure during burn-in, with failure analysis and corrective actions if exceeded. Sampling plans ensure defect rates below 3%. Life tests last 1000-3000 hours at 125°C depending on process maturity. Failure mechanisms include electromigration, ionic contamination, hot carrier injection, and dielectric rupture. Product sign-off requires all parties' approval after reliability confirmation. Space products undergo burn-in and quality conformance inspections with strict failure limits. Derating is unnecessary as datasheet limits are set at 6-sigma from characterization data, ensuring reliability.
Application Notes & White Papers (1)
- End Of Life NoticePDF 153 KB PLC11027 Apr 13, 2011
- Product AdvisoryPDF 499 KB PA11003 Jan 05, 2011
- Product Change NoticePDF 230 KB PCN10123 Dec 06, 2010
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