Features
- High-voltage type (20V rating)
- 3-state non-inverting type
- 1 TTL load output drive capability
- 2 output disable controls
- 3 state outputs
- Pin compatible with industry types MM80C97, MC14503 and 340097
- 5V, 10V and 15V parametric ratings
- Maximum input current of 1µA at 18V over full package temperature range; 100nA at 18V and +25 °C
- Meets all requirements of JEDEC tentative standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
Description
CD4503BMS is a hex noninverting buffer with 3 state outputs that have high sink and source current capability. Two disable controls are provided, one of which controls four buffers and the other controls the remaining two buffers. The CD4503BMS is supplied in these 16-lead outline packages: Braze Seal DIP H4T, Frit Seal DIP H1E, Ceramic Flatpack H6W.
Applications
- 3 state hex buffer for interfacing ICs with data buses
- COS/MOS to TTL hex buffer
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pitch (mm) | Pkg. Dimensions (mm) | DLA SMD | Pb (Lead) Free | Pb Free Category | MOQ | Temp. Range (°C) | CAGE code |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CD4503BDMSR | Obsolete | N/A | Out of Stock | SBDIP | 16# | Tube | Not Applicable | 2.5mm | 20.3 x 7.5 x 2.41 | 5962R9664301VEC | Exempt | Gold Plate over compliant Undercoat-e4 | 25 | -55 to +125°C | 34371 |
| CD4503BKMSR | Obsolete | N/A | Out of Stock | CFP | 16# | Tray | Not Applicable | 1.3mm | 10.4 x 6.9 x 0.00 | 5962R9664301VXC | Exempt | Gold Plate over compliant Undercoat-e4 | 25 | -55 to +125°C | 34371 |
| CD4503BKNSR | Obsolete | N/A | Out of Stock | CFP | 16# | Tray | Not Applicable | 1.3mm | 10.4 x 6.9 x 0.00 | Exempt | Gold Plate over compliant Undercoat-e4 | 25 | -55 to +125°C | 34371 |
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- Price Increase NoticePDF 360 KB PIN19011 Apr 10, 2019
- End Of Life NoticePDF 200 KB PLC15033 Jun 11, 2015
- Product AdvisoryPDF 499 KB PA11003 Jan 05, 2011
- Product Change NoticePDF 230 KB PCN10123 Dec 06, 2010
- Application NotePDF 224 KB an9654 May 05, 1999AI-generated Summary: The document explains the reliability and failure mechanisms of semiconductor parts, focusing on life testing and wearout. It discusses how switching states cause transient current pulses and hot carrier injection, which only occur briefly during switching. Life testing at elevated temperatures accelerates aging to remove infant mortality failures, improving reliability. The failure rate follows a bathtub curve with infant mortality, useful life, and wearout phases, modeled by lognormal and exponential distributions. The Arrhenius equation relates failure rates at different temperatures. Burn-in and life tests reduce early failures without harming intrinsic reliability.
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- Application NotePDF 224 KB an9654 May 05, 1999AI-generated Summary: The document explains the reliability and failure mechanisms of semiconductor parts, focusing on life testing and wearout. It discusses how switching states cause transient current pulses and hot carrier injection, which only occur briefly during switching. Life testing at elevated temperatures accelerates aging to remove infant mortality failures, improving reliability. The failure rate follows a bathtub curve with infant mortality, useful life, and wearout phases, modeled by lognormal and exponential distributions. The Arrhenius equation relates failure rates at different temperatures. Burn-in and life tests reduce early failures without harming intrinsic reliability.
Application Notes & White Papers (1)
- Price Increase NoticePDF 360 KB PIN19011 Apr 10, 2019
- End Of Life NoticePDF 200 KB PLC15033 Jun 11, 2015
- Product AdvisoryPDF 499 KB PA11003 Jan 05, 2011
- Product Change NoticePDF 230 KB PCN10123 Dec 06, 2010
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