Features
- High Voltage Type (20V Rating)
- Non-Inverting Type
- High Sink Current for Driving 2 TTL Loads
- High-to-Low Level Logic Conversion
- 100% Tested for Quiescent Current at 20V
- Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25°C
- 5V, 10V and 15V Parametric Ratings
Description
Support is limited to customers who have already adopted these products.
The CD4050BMS is an non-inverting hex buffer and features logic level conversion using only one supply voltage (VCC). The input signal high level (VIH) can exceed the VCC supply voltage when this device is used for logic level conversions. This device is intended for use as CMOS to DTL/TTL converters and can drive directly two DTL/TTL loads. (VCC = 5V, VOL ¡Ü 0. 4V, and IOL ¡Ý 3. 3mA. The CD4050BMS is designated as replacement for CD4010B. Because the CD4050BMS requires only one power supply, it is preferred over the CD4010B and should be used in place of the CD4010B in all inverter, current driver, or logic level conversion applications. In these applications the CD4050BMS is pin compatible with the CD4010B, and can be substituted for this device in existing as well as in new designs. Terminal No. 16 is not connected internally on the CD4050BMS, therefore, connection to this terminal is of no consequence to circuit operation. For applications not requiring high sink current or voltage conversion, the CD4069UB Hex Inverter is recommended. The CD4050BMS is supplied in these 16 lead outline packages: Braze Seal DIP H4T Frit Seal DIP H1E Ceramic Flatpack H3X
Applications
- CMOS to DTL/TTL Hex Converter
- CMOS Current "Sink" or "Source" Driver
- CMOS High-to-Low Logic Level Converter
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | DLA SMD | Pb (Lead) Free | MOQ | Temp. Range (°C) | CAGE code |
|---|---|---|---|---|---|---|---|---|---|---|---|
| CD4050BDMSR | Obsolete | N/A | Out of Stock | SBDIP | 16# | Tube | 5962-96637 | No | 15 | -55 to +125°C | 34371 |
- Application NotePDF 224 KB an9654 May 05, 1999AI-generated Summary: The document explains the reliability and failure mechanisms of semiconductor parts, focusing on life testing and wearout. It discusses how switching states cause transient current pulses and hot carrier injection, which only occur briefly during switching. Life testing at elevated temperatures accelerates aging to remove infant mortality failures, improving reliability. The failure rate follows a bathtub curve with infant mortality, useful life, and wearout phases, modeled by lognormal and exponential distributions. The Arrhenius equation relates failure rates at different temperatures. Burn-in and life tests reduce early failures without harming intrinsic reliability.
Recommended Documents (1)
Datasheets (1)
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- Application NotePDF 224 KB an9654 May 05, 1999AI-generated Summary: The document explains the reliability and failure mechanisms of semiconductor parts, focusing on life testing and wearout. It discusses how switching states cause transient current pulses and hot carrier injection, which only occur briefly during switching. Life testing at elevated temperatures accelerates aging to remove infant mortality failures, improving reliability. The failure rate follows a bathtub curve with infant mortality, useful life, and wearout phases, modeled by lognormal and exponential distributions. The Arrhenius equation relates failure rates at different temperatures. Burn-in and life tests reduce early failures without harming intrinsic reliability.
Application Notes & White Papers (1)
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