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Features

  • Low skew, low jitter PLL clock driver
  • I2C for functional and output control
  • Feedback pins for input to output synchronization
  • Spread Spectrum tolerant inputs
  • 3.3V tolerant CLK_INT input

Description

DDR Zero Delay Clock Buffer

Part NumberStatusSamplesStockPackageLead Count (#)Temp. GradePb (Lead) FreeCarrier Type
93722CFLFObsoleteN/AOut of StockSSOP28#CYesTube
93722CFLFTObsoleteN/AOut of StockSSOP28#CYesReel

Support Communities

  1. SLG46108 DC Powerline Communication for longer wires

    Dear support, I found your application note AN-CM-318 very useful. https://www.dialog-semiconductor.com/sites/default/files/2021-09/AN-CM-… I rebuild it and it works for short wire connections. I would be interested if it could also work ...

    Apr 5, 2022
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