Features
- Six LVCMOS / LVTTL outputs
- Outputs able to drive 12 series terminated lines
- Crystal Oscillator Interface
- Crystal input frequency range: 10MHz to 40MHz
- Output skew: 80ps (maximum)
- RMS phase jitter @ 25MHz, (100Hz – 1MHz): 0.26ps (typical), VDD = VDDO = 2.5V
Offset Noise Power
100Hz.................-129.7 dBc/Hz
1kHz...................-144.4 dBc/Hz
10kHz.................-147.3 dBc/Hz
100kHz...............-157.3 dBc/Hz - 5V tolerant enable inputs
- Synchronous output enables
- Operating power supply modes:
Full 3.3V, 2.5V, 1.8V
Mixed 3.3V core/2.5V output operating supply
Mixed 3.3V core/1.8V output operating supply
Mixed 2.5V core/1.8V output operating supply - 0°C to 70°C ambient operating temperature
- Available in lead-free (RoHS 6) package
Description
The 83905 is a low skew, 1-to-6 LVCMOS / LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 6 to 12 by utilizing the ability of the outputs to drive two series terminated lines. The 83905 is characterized at full 3.3V, 2.5V, and 1.8V, mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply mode. Guaranteed output and part-to-part skew characteristics along with the 1.8V output capabilities makes the 83905 ideal for high performance, single ended applications that also require a limited output voltage.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Qty. per Carrier (#) | Package Area (mm²) | Pitch (mm) | Pkg. Dimensions (mm) | Qty. per Reel (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 83905AGLF | Obsolete | N/A | In Stock | TSSOP | 16# | Tube | 1 | 96# | 22mm² | 0.65mm | 5.0 x 4.4 x 1.0 | 0 | Yes | e3 Sn | 0 to 70°C |
| 83905AGLFT | Obsolete | N/A | In Stock | TSSOP | 16# | Reel | 1 | 0 | 22mm² | 0.65mm | 5.0 x 4.4 x 1.0 | 2500# | Yes | e3 Sn | 0 to 70°C |
| 83905AKLF | Obsolete | N/A | In Stock | VFQFPN | 20# | Tray | 1 | 490# | 16mm² | 0.5mm | 4.0 x 4.0 x 1.0 | 0 | Yes | e3 Sn | 0 to 70°C |
| 83905AKLFT | Obsolete | N/A | In Stock | VFQFPN | 20# | Reel | 1 | 0 | 16mm² | 0.5mm | 4.0 x 4.0 x 1.0 | 2500# | Yes | e3 Sn | 0 to 70°C |
| 83905AMLF | Obsolete | N/A | In Stock | SOIC | 16# | Tube | 3 | 48# | 38.6mm² | 1.27mm | 9.9 x 3.9 x 1.5 | 0 | Yes | e3 Sn | 0 to 70°C |
| 83905AMLFT | Obsolete | N/A | In Stock | SOIC | 16# | Reel | 3 | 0 | 38.6mm² | 1.27mm | 9.9 x 3.9 x 1.5 | 2500# | Yes | e3 Sn | 0 to 70°C |
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- Application NotePDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
- Product Change NoticePDF 2.97 MB Dec 08, 2020
- End Of Life NoticePDF 743 KB Jun 11, 2020
- Product Change NoticePDF 5.71 MB Jun 09, 2020
- End Of Life NoticePDF 715 KB Jun 03, 2020
- Application NotePDF 495 KB 7WDXRDKU4E7E-5-57312 May 12, 2014
- Application NotePDF 442 KB 7WDXRDKU4E7E-5-57298 May 08, 2014
- End Of Life NoticePDF 363 KB 7WDXRDKU4E7E-5-55609 Jun 14, 2013
- Product Change NoticePDF 361 KB 7WDXRDKU4E7E-5-55130 Mar 24, 2013
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- Application NotePDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
- Application NotePDF 495 KB 7WDXRDKU4E7E-5-57312 May 12, 2014View More (8)
Application Notes & White Papers (8)
- Product Change NoticePDF 2.97 MB Dec 08, 2020
- End Of Life NoticePDF 743 KB Jun 11, 2020
- Product Change NoticePDF 5.71 MB Jun 09, 2020
- End Of Life NoticePDF 715 KB Jun 03, 2020
- Product Change NoticePDF 5.61 MB Jan 08, 2020View More (13)
Product Notices (PCN, EOL, etc) (13)
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Description
Provides an overview of the features and benefits of IDT's industry-leading fanout buffer and clock distribution portfolio. Fanout buffers are a useful building block of many clock trees, providing signal buffering and multiple low-skew copies of the input signal. The clock fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Presented by Vik Chaudhry, technical marketing manager at IDT. For more information about Renesas's clock IC timing solutions, visit the Clock Buffers & Drivers page.
Support Communities
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BLE_ERRORINTSTAT happens during long-term test
Hi, teams. As titles says, I got BLE_ERRORINTSTAT_BIT during long-term test. It happens within 24 hours normally, but varys from in a few hours to more than 12 hours. How can I debug this problem?
Dec 27, 2019