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Features

  • Typical tSK(o) (Output Skew) 250ps
  • ESD > 2000V per MIL-STD-883, Method 3015
  • > 200V using machine model (C = 200pF, R = 0)
  • VCC = 3.3V ± 0.3V, Normal Range
  • VCC = 2.7V to 3.6V, Extended Range
  • CMOS power levels (0.4 uW typ. static)
  • All inputs, outputs, and I/O are 5V tolerant
  • Supports hot insertion
  • Available in 56 pin SSOP package

Description

The 74LVC16601A 18-bit universal bus transceiver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. All pins can be driven from either 3.3V or 5V devices which allows the use of this device as a translator in a mixed 3.3V/5V supply system. The 74LVC16601A operates at -40C to +85C
Part NumberStatusSamplesStockPackageLead Count (#)Temp. GradePb (Lead) FreeCarrier Type
74LVC16601APVGObsoleteN/AIn StockSSOP56#CYesTube
74LVC16601APVG8ObsoleteN/AOut of StockSSOP56#CYesReel
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