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Features

  • High performance system speed - 150 MHz (3.8 ns Clock-to-Data Access)
  • ZBTTM Feature - No dead cycles between write and read cycles
  • Internally synchronized output buffer enable eliminates the need to control OE
  • Single R/W (READ/WRITE) control pin
  • Positive clock-edge triggered address, data, and control signal registers for fully pipelined applications
  • 4-word burst capability (interleaved or linear)
  • Individual byte write (BW1 - BW4) control (May tie active)
  • Three chip enables for simple depth expansion
  • 3.3V power supply (±5%), 2.5V I/O Supply (VDDQ)
  • Available in 100-pin TQFP and 119-pin BGA packages

Description

The 71V2546 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V2546 has an on-chip burst counter. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.
Part NumberStatusSamplesStockPackageLead Count (#)Temp. GradePb (Lead) FreeCarrier Type
71V2546S100BGObsoleteN/AOut of StockPBGA119#CNoTray
71V2546S100BG8ObsoleteN/AOut of StockPBGA119#CNoReel
71V2546S100BGIObsoleteN/AOut of StockPBGA119#INoTray
71V2546S100BGI8ObsoleteN/AOut of StockPBGA119#INoReel
71V2546S100PFGObsoleteN/AIn StockTQFP100#CYesTray
71V2546S100PFG8ObsoleteN/AOut of StockTQFP100#CYesReel
71V2546S133BGObsoleteN/AOut of StockPBGA119#CNoTray
71V2546S133BG8ObsoleteN/AOut of StockPBGA119#CNoReel
71V2546S133BGIObsoleteN/AOut of StockPBGA119#INoTray
71V2546S133BGI8ObsoleteN/AOut of StockPBGA119#INoReel
71V2546S133PFGObsoleteN/AIn StockTQFP100#CYesTray
71V2546S133PFG8ObsoleteN/AOut of StockTQFP100#CYesReel
71V2546S150BGObsoleteN/AOut of StockPBGA119#CNoTray
71V2546S150BG8ObsoleteN/AOut of StockPBGA119#CNoReel
71V2546S150PFGObsoleteN/AIn StockTQFP100#CYesTray
71V2546S150PFG8ObsoleteN/AOut of StockTQFP100#CYesReel
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