Features
- True Dual-Ported memory cells which allow simultaneous reads of the same memory location
- Separate upper-byte and lower-byte control
- 70V261 easily expands data bus width to 32 bits or more
- On-chip port arbitration logic
- Full on-chip hardware support of semaphore signaling between ports
- Fully asynchronous operation from either port
- TTL-compatible, single 3.3V (±0.3V) power supply
- Available in 100-pin TQFP package
- Industrial temperature range (-40C to +85C) is available
70V261 - Block Diagram
Description
The 70V261 is a high-speed 16K x 16 Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or wider memory system applications resulting in full speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode.
Parameters
| Attributes | Value |
|---|---|
| Core Voltage (V) | 3.3 |
| Bus Width (bits) | 16 |
| Density (Kb) | 256 |
| Pkg. Code | PNG100 |
| Interface | Async |
| I/O Type | 3.3 V LVTTL |
| Access Time (ns) | 25, 35 |
| Temp. Range (°C) | -40 to 85°C, 0 to 70°C |
| Architecture | Dual-Port |
| Organization | 16K x 16 |
| Function | Busy, Interrupt, Master, Semaphore, Slave |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| TQFP | 14.0 x 14.0 x 1.4 | 100 | 0.5 |
Support Communities
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70V261L25PFGI DPRAM interface issues
Hi, Currently we are using the DPRAM of CY7C026AV-25AXI from Infineon in our product. And the Infineon part got obsoleted and identified the drop-in replacement as 70V261L25PFGI from Renesas. We tried to interface the 70V261L25PFGI in the board and started testing the read and write operations. We could ...
Jan 4, 2024
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