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551

Not Recommended for New Designs

1 to 4 Clock Buffer

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Alternative(s) Available
551S - Low Skew 1 to 4 Clock Buffer
  • Notes:Improved jitter performance, smaller package, 1.8V to 3.3V supply voltage

Features

  • Low skew (250 ps) outputs
  • Pb-free packaging
  • Low cost clock buffer
  • Packaged in 8-pin SOIC
  • Input/Output clock frequency up to 160 MHz
  • Non-inverting output clock
  • Ideal for networking clocks
  • Operating Voltages of 3.3 and 5.0 V
  • Output Enable mode tri-states outputs
  • Advanced, low power CMOS process
  • Commercial and industrial temperature versions
Find Other Products in Clock Distribution
551 - Block Diagram
551 - Pinout
551 - Block Diagram
551 - Block Diagram
551 - Pinout

Description

The 551 is a low cost, high-speed single input to four output clock buffer. Part of Renesas' ClockBlocksTM family, this is our lowest cost, small clock buffer. See the 552-02B for monolithic dual version of the 551 in a 20 pin QSOP. IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact Renesas for all of your clocking needs.

Part NumberStatusSamplesStockPackageBudgetary Price (USD)Lead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Qty. per Reel (#)Qty. per Carrier (#)Pb (Lead) FreePb Free CategoryTemp. Range (°C)Country of AssemblyCountry of Wafer Fabrication
551MILFNRNDN/AIn StockSOIC1ku | $1.058#Tube1097#Yese3 Sn-40 to 85°CTAIWANSINGAPORE
551MILFTNRNDN/AIn StockSOIC1ku | $1.058#Reel13000#0Yese3 Sn-40 to 85°CTAIWANSINGAPORE
551MLFNRNDN/AIn StockSOIC1ku | $0.88#Tube1097#Yese3 Sn0 to 70°CTAIWANSINGAPORE
551MLFTNRNDN/AIn StockSOIC1ku | $0.88#Reel13000#0Yese3 Sn0 to 70°CTAIWANSINGAPORE
551MLNObsoleteN/AOut of StockSOIC8#Tube1097#Yese3 Sn0 to 70°C
551MLNTObsoleteN/AOut of StockSOIC8#Reel13000#0Yese3 Sn0 to 70°C
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    Recommended Documents (1)

  1. Datasheet
    551 Datasheet
    RECOMMENDED
    PDF 235 KB 7WDXRDKU4E7E-5-32698 May 15, 2010

    Datasheets (1)

  1. Datasheet
    551 Datasheet
    RECOMMENDED
    PDF 235 KB 7WDXRDKU4E7E-5-32698 May 15, 2010

    Application Notes & White Papers (11)

  1. Application Note
    AN-805 Recommended Ferrite Beads
    PDF 91 KB R31AN0042EU0102 Rev.1.02 Aug 11, 2025
  2. Application Note
    Termination Options for High-Speed LVCMOS Driver Clock Drivers
    PDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
  3. Application Note
    AN-827 Application Relevance of Clock Jitter
    PDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
  4. Application Note
    AN-828 Termination - LVPECL
    PDF 322 KB 7WDXRDKU4E7E-5-57262 Jul 06, 2016
  5. Application Note
    AN-844 Termination - AC Coupling Clock Receivers
    PDF 170 KB 7WDXRDKU4E7E-5-57318 May 13, 2014
    6. View More (11)

    Product Notices (PCN, EOL, etc) (10)

  1. Product Change Notice
    PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly
    PDF 611 KB 7WDXRDKU4E7E-5-60321 Apr 14, 2016
  2. Product Change Notice
    PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly
    PDF 611 KB 7WDXRDKU4E7E-5-59927 Feb 15, 2016
  3. Product Change Notice
    PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages
    PDF 95 KB 7WDXRDKU4E7E-5-59609 Oct 22, 2015
  4. Product Change Notice
    PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages
    PDF 50 KB 7WDXRDKU4E7E-5-59245 Jul 21, 2015
  5. End Of Life Notice
    PDN# : CQ-14-02R2
    PDF 549 KB 7WDXRDKU4E7E-5-57574 Aug 05, 2014
    6. View More (10)

    Marketing Collateral (2)

  1. Overview
    Clock Distribution Overview
    PDF 217 KB 7WDXRDKU4E7E-6-10433 Nov 07, 2020
  2. Product Brief
    IDT Fanout Buffers Product Overview
    PDF 739 KB 7WDXRDKU4E7E-6-7820 Feb 17, 2015
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Simulation Models

    Simulation Models (1)

  1. Model - IBIS
    551 3.3V IBIS Model
    ZIP 4 KB 7WDXRDKU4E7E-5-45754 Mar 09, 2006
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Support Communities

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    The OPAMP SLG88103/4 does not contain all the information that is required.Unfortunately, I am missing information on the PDx pins in the datasheet:- Absolute maximum ratings for the PDx pins?- Are there ESD protection diodes on the PDx pins?- Input logic high (min, typ, max)?- Input logic ...

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    Hi, I'm seriously considering making the leap from Teensy 3.1 (super easy, Arduino-compatible board) to a Renesas RZ in order to drastically improve the performance for a project I'm building - basically a digital synthesizer, which I intend to eventually manufacture in small quantities. Key things I ...

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Knowledge Base

  1. Runtime Java Exceptions in SSP

    ... plugins/org.eclipse.equinox.launcher_1.4.0.v20161219-1356.jar --launcher.library plugins/org.eclipse.equinox.launcher.win32.win32.x86_1.1.551.v20171108-1834 --launcher.defaultAction openFile -vm features/com.renesas.jre.win32.win32.x86_1.8.0.181/jre/bin -vmargs -Declipse ...

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