Description
The 3858 Group is supported only for customers who have already adopted these products.
Applications
- Home Appliance
| Part Number | Status | Samples | Stock | RoHS | Package | Bit Size | RAM (KB) | Lead Count (#) | Operating Freq (Max) (MHz) | CPU | LVD or PVD | DMA | Timer | ADC | Ethernet | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| M38588GC-XXXFP#U0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | SSOP | 8 | 1.5KB | 42# | 12.5MHz | 740 | No | No | 8-bit x 4-ch, 16-bit x 2-ch | 8-bit x 9-ch | No | -20 to +85 |
| M38588GC-XXXFP#W4 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | SSOP | 8 | 1.5KB | 42# | 12.5MHz | 740 | No | No | 8-bit x 4-ch, 16-bit x 2-ch | 8-bit x 9-ch | No | -20 to +85 |
| M38588GCFP#U0 | Obsolete | N/A | In Stock | RoHS:EN RoHS:JA | SSOP | 8 | 1.5KB | 42# | 12.5MHz | 740 | No | No | 8-bit x 4-ch, 16-bit x 2-ch | 8-bit x 9-ch | No | -20 to +85 |
| M38588GCSP#U0 | Obsolete | N/A | In Stock | RoHS:EN RoHS:JA | SDIP | 8 | 1.5KB | 42# | 12.5MHz | 740 | No | No | 8-bit x 4-ch, 16-bit x 2-ch | 8-bit x 9-ch | No | -20 to +85 |
Filters
Applied Filters
- Product Change Notice
- Product Change Notice
- Product Change Notice
- Application NoteAI-generated Summary: The document details serial I/O connections for the 3858 Group MCU, illustrating examples of interfacing with peripheral ICs equipped with CS pins and connections between multiple MCUs. It explains clock synchronous serial I/O modes, including transmission only, transmission and reception, and multiple IC connections. It also covers the use of internal and external clocks and the SRDY1 signal output function in UART mode 0. Specific pin assignments for serial I/O1 and serial I/O2 are provided.
- Document
- Application NoteAI-generated Summary: The document explains the reset circuit operation and connection examples for the 3858 Group MCU. The MCU enters reset when the RESET pin is held low for 20 or more XIN input cycles with stable power voltage between 2.7 V and 5.5 V. Reset releases after the RESET pin goes high and 8 to 13 XIN cycles pass, starting the system clock and program execution. Examples include a power-on reset circuit and a RAM backup system that switches to backup mode upon power drop detection.
- Application NoteAI-generated Summary: The 3858 Group MCU supports two power-saving modes: stop mode and wait mode. In stop mode, the main and sub clocks stop oscillating, halting the CPU and peripherals to reduce power consumption. I/O ports maintain their state, timers and serial I/O stop except in specific modes, and RAM is held if voltage is sufficient. Exiting stop mode requires an enabled interrupt or reset, with oscillation stabilization time managed by prescaler and timer settings. Watchdog timer operation during standby requires prior configuration.
- Application NotePDF 85 KB REJ05B1128-0100 Rev.1.00 Mar 21, 2008AI-generated Summary: The 3858 Group MCU performs A/D conversion by comparing an analog input voltage (VIN) with a reference voltage (Vref) using a successive approximation method. The conversion process updates the A/D conversion buffer register bit by bit, starting with the highest-order bit. Conversion completes after 109 clock cycles, storing the digital result in the A/D conversion register and triggering an interrupt request. The document includes details on timing, register behavior, and equivalent circuit diagrams.
- Application NoteAI-generated Summary: The document explains how to operate Timer Z1 in pulse period measurement mode on the M3858 Group MCU with an 8 MHz oscillator. It details setting the timer to measure the time between two falling or rising edges of an input pulse on the CNTRz pin. The timer counts based on selectable clock divisions and stores the 1's complement of the measured period. An example using infrared remote control signals demonstrates detecting valid pulses by measuring their periods, triggering an LED output. Register configurations for port control, timer mode, and count source selection are provided.Related Files:
- Application NoteAI-generated Summary: The document details the register structures and functions for the 3858 Group MCU. It explains control register bits, their read/write properties, and reset states. It provides specific register layouts for Port Pi (i=0 to 4), including port data registers and direction registers, describing input/output modes, bit functions, and notes on pull-up resistor behavior and output structure selection. The document clarifies how bits behave after reset and during read/write operations.
- Application NoteAI-generated Summary: The document explains the key scan function for a 4x4 key matrix using the 3858 Group MCU operating at 8 MHz. It details the scan output and key input ports, scanning interval of 2.5 ms, and conditions such as disabling input when two keys are pressed simultaneously. It includes connection diagrams, RAM and flag definitions, and register settings necessary for implementation.Related Files:
- Technical Update
Recommended Documents (1)
Datasheets (1)
Manuals & Guides (1)
- Application NoteAI-generated Summary: The document details serial I/O connections for the 3858 Group MCU, illustrating examples of interfacing with peripheral ICs equipped with CS pins and connections between multiple MCUs. It explains clock synchronous serial I/O modes, including transmission only, transmission and reception, and multiple IC connections. It also covers the use of internal and external clocks and the SRDY1 signal output function in UART mode 0. Specific pin assignments for serial I/O1 and serial I/O2 are provided.
- Application NoteAI-generated Summary: The document explains the reset circuit operation and connection examples for the 3858 Group MCU. The MCU enters reset when the RESET pin is held low for 20 or more XIN input cycles with stable power voltage between 2.7 V and 5.5 V. Reset releases after the RESET pin goes high and 8 to 13 XIN cycles pass, starting the system clock and program execution. Examples include a power-on reset circuit and a RAM backup system that switches to backup mode upon power drop detection.
- Application NoteAI-generated Summary: The 3858 Group MCU supports two power-saving modes: stop mode and wait mode. In stop mode, the main and sub clocks stop oscillating, halting the CPU and peripherals to reduce power consumption. I/O ports maintain their state, timers and serial I/O stop except in specific modes, and RAM is held if voltage is sufficient. Exiting stop mode requires an enabled interrupt or reset, with oscillation stabilization time managed by prescaler and timer settings. Watchdog timer operation during standby requires prior configuration.
- Application NotePDF 85 KB REJ05B1128-0100 Rev.1.00 Mar 21, 2008AI-generated Summary: The 3858 Group MCU performs A/D conversion by comparing an analog input voltage (VIN) with a reference voltage (Vref) using a successive approximation method. The conversion process updates the A/D conversion buffer register bit by bit, starting with the highest-order bit. Conversion completes after 109 clock cycles, storing the digital result in the A/D conversion register and triggering an interrupt request. The document includes details on timing, register behavior, and equivalent circuit diagrams.
- Application NoteAI-generated Summary: The document explains how to operate Timer Z1 in pulse period measurement mode on the M3858 Group MCU with an 8 MHz oscillator. It details setting the timer to measure the time between two falling or rising edges of an input pulse on the CNTRz pin. The timer counts based on selectable clock divisions and stores the 1's complement of the measured period. An example using infrared remote control signals demonstrates detecting valid pulses by measuring their periods, triggering an LED output. Register configurations for port control, timer mode, and count source selection are provided.Related Files:View More (30)
Application Notes & White Papers (30)
- Product Change Notice
- Product Change Notice
- Product Change Notice
Product Notices (PCN, EOL, etc) (3)
- Technical Update
- Technical UpdatePDF 18 KB TN-M740-22-0012 Dec 01, 2000
Errata & Technical Updates (5)
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Other (1)
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- IDE and Coding ToolRenesas integrated development environment (IDE) (for SuperH, RX, R8C, M32R, M16C, H8SX, H8S, H8, and 740 families).
- Compiler/AssemblerAssembler Package for 740 Family, * Comes with High-performance Embedded Workshop and the simulator debugger.
- Compiler/AssemblerC Compiler Package for 740 Family. High-performance Embedded Workshop and Simulator debugger included.
- EmulatorEmulator for M16C, 7700, 740 Families [Overseas Standards Compliant]. Support for 20MHz-or-less operation of target MCU.
- Programmer (Unit/SW)On-chip debugging emulator available as a flash memory programmer [Available flash programming software: Flash Development Toolkit]
- Programmer (Unit/SW)On-chip debugging emulator available as a flash memory programmer [Available flash programming software: Flash Development Toolkit] [Support MCU/MPU and devices: SuperH RISC engine, R8C, M16C, H8SX, H8S, H8, 740]
- Programmer (Unit/SW)Flash memory programming software. [Support MCU/MPU and devices: SuperH RISC engine, RX, R8C, M16C, H8SX, H8S, H8, 740]
- Programmer (Unit/SW)Connected with a Flash Programmer, these IC Socket Boards enable reprogramming of the on-chip Memory before mounting.
- Software & Tools - Other
- Software & Tools - Other
- SimulatorSimulator Debugger for 740 Family [Support IDE : High-performance Embedded Workshop] (Note: This product is included in Compiler Package and Assembler Package, and is not available separately.)
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- IDE and Coding ToolRenesas integrated development environment (IDE) (for SuperH, RX, R8C, M32R, M16C, H8SX, H8S, H8, and 740 families).
- Compiler/AssemblerAssembler Package for 740 Family, * Comes with High-performance Embedded Workshop and the simulator debugger.
- Compiler/AssemblerC Compiler Package for 740 Family. High-performance Embedded Workshop and Simulator debugger included.
- EmulatorEmulator for M16C, 7700, 740 Families [Overseas Standards Compliant]. Support for 20MHz-or-less operation of target MCU.
- Programmer (Unit/SW)On-chip debugging emulator available as a flash memory programmer [Available flash programming software: Flash Development Toolkit]View More (11)
Software & Tools (11)
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Sample Code (16)
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Support Communities
-
RZ/A1L TXI interrupt handling for SCI with FIFO
Could anybody provide a sample code for handling TXI interrupt? I am able to set the registers properly and Receive and transmit data correctly. but not sure how to handle the TXI interrupt. At the time of initialization, I am enabling TIE and RIE bit in SCSCR register but as ...
Oct 31, 2017 -
RZ/G2UL QSPI flash bring up in kernel
... ssi-pcm-audio 1004a800.ssi: DMA enabled [ 2.364242] renesas_sdhi_internal_dmac 11c10000.mmc: mmc1 base at 0x0000000011c10000, max clock rate 100 MHz [ 2.385878] ALSA device list: [ 2.391438] #0: sm2s-rzg2ul-card1 [ 2.398159] Waiting for root device /dev/mmcblk0p2... [ 2.487757] mmc1: new ...
Jun 20, 2023 -
M16C64 ID code from E8A
I was debugging my code on M16C64 processor using E8A emulator. My code was writing some dummy data to Program ROM2 and Block 0 of Program ROM1. I debugged my code successfully. But now I am trying to connect E8A again but it is asking me ID code. As per ...
Mar 15, 2012
Knowledge Base
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(3850A,3858) Does SOUT2 goes to high impedance even P51/SOUT2 set to CMOS output?
When the internal is selected as the transfer clock, the SOUT2 pin goes to high impedance regardless of the P01/SOUT2, P02/SCLK2 P-channel output disable bit setting. In regards to timing, the SOUT2 pin goes to high impedance a half-cycle of the transfer clock after ...
Jun 9, 2005 -
What state does the A/D converter go when STP instruction is executed?
The A/D converter goes to stop mode in the state it was in at the time the STP instruction was executed. Therefore, please make sure the A/D conversion has completed before executing the STP instruction. Even if the MCU goes to stop mode during an A ...
Mar 1, 2005 -
Can you explain the quotient and remainder value in DIV instruction?
The quotient value and reminder value are indeterminate. Before executing the instruction, prevent quotient overflow at the program level. The quotient value and remainder value are indeterminate. Before executing the instruction, prevent the divisor from becoming 0 at the program level. The quotient value is 0 and the remainder value ...
Jun 6, 2007