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Renesas Electronics Corporation

Features

  • 8-pin SOIC package (Pb-free)
  • Highly accurate frequency generation
  • M/N Multiplier PLL: M = 1...2048, N = 1...1024
  • Output clock frequencies up to 200 MHz
  • Four ROM locations for frequency and spread selection
  • Spread spectrum capability for lower system EMI

Description

The 341 is a low cost, single-output, field programmable clock synthesizer. The 341 can generate an output frequency from 250 kHz to 200 MHz and may employ Spread Spectrum techniques to reduce system electro-magnetic interference (EMI). Using IDT's VersaClock™ software to configure the PLL and output, the 341 contains a One-Time Programmable (OTP) ROM to allow field programmability. Programming features include 4 selectable configuration registers. The device employs Phase-Locked Loop (PLL) techniques to run from a standard fundamental mode, inexpensive crystal, or clock. It can replace multiple crystals and oscillators, saving board space and cost. The device also has a power-down feature that tri-states the clock outputs and turns off the PLLs when the PDTS pin is taken low. The 341 is also available in factory programmed custom versions for high-volume applications.

Part NumberStatusSamplesStockPackageLead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Qty. per Reel (#)Qty. per Carrier (#)Pb (Lead) FreePb Free CategoryTemp. Range (°C)
341MIPLFObsoleteN/AOut of StockSOIC8#Tube1097#Yese3 Sn-40 to 85°C
341MIPLFTObsoleteN/AOut of StockSOIC8#Reel13000#0Yese3 Sn-40 to 85°C
341MPLFObsoleteN/AIn StockSOIC8#Tube1097#Yese3 Sn0 to 70°C
341MPLFTObsoleteN/AIn StockSOIC8#Reel13000#0Yese3 Sn0 to 70°C

Support Communities

  1. error: L6047U: The size of this image (34196 bytes) exceeds the maximum allowed for this version of the linker

    Hi Dialog team, In the source code of "DA14583 IoT Sensor Development Kit", when CFG_PRINTF was defined and built, the following error was displayed. .\out_583\wrbl_sfl_583.axf: error: L6047U: The size of this image (34196 bytes) exceeds the maximum allowed for this version of the linker ...

    Dec 20, 2017
  2. Using H8/3687 cpu with assembly code

    Hello,I have a question and can't seem to find the answer anywhere.I try to re-write code, that was ment for a H8SX-1664, to work with a H8/3687.This code is included with some assemlby. When i change the processor from H8SX to H8 ...

    Apr 4, 2012
  3. RZ/G2E U-Boot config PRESET MD Pin(GPIO)

    Hi team, How to config PRESET PIN from u-boot Like MD3(GP1_18)、MD4(GP0_04)、MD5(GP0_06)、MD6(GP0_09)、MD21(GP1_07) I want to disable it. Best regard.

    Apr 30, 2024
View All Results from Support Communities (180)

Knowledge Base

  1. TPS-1 Software Support of SNMP Version 3

    The SNMP protocol has to be supported from Conformance Class B onwards and is implemented in the TPS-1 stack. The SNMP version information is described in the PROFINET V2.3 specification as “The SNMP services shall be derived from the IETF RFC 3418 (SNMP) standard." RFC 3418 means SNMP ...

    Jun 2, 2017
  2. How to use PWM in RZ/G2L EVK?

    ... backlight { +       compatible = "pwm-backlight"; +       pwms = <&gpt3 0 50000>; + +       brightness-levels = <0 2 8 16 32 64 128 255>; +       default-brightness-level = <6>; +   };  };    &adc { @@ -341,6 +349,17 @@ sd0_mux_uhs {             pinmux = ; /* SD0_CD */         };     }; + +   gpt3_pins: gpt3 { +           pinmux = Jan 29, 2026

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