Overview
Description
The 180-01 generates a low EMI output clock from a clock or crystal input. The device uses IDT's proprietary mix of analog and digital Phase Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The 180-01 offers down spread selection of -1.25% and -3.75%. Refer to the MK1714-01/02 for the widest selection of input frequencies and multipliers. IDT offers a complete line of EMI reducing clock generators. Consult us when you need to remove crystals and oscillators from your board.
Features
- Pin and function compatible to Cypress W180-01
- Packaged in 8-pin SOIC
- Provides a spread spectrum output clock
- Accepts a clock input and provides same frequency dithered output
- Input frequency of 8 to 28 MHz
- Peak reduction by 7dB - 14dB typical on 3rd - 19th odd harmonics
- Spread percentage selection for -1.25% and -3.75%
- Operating voltage of 3.3 V and 5 V
- Advanced, low-power CMOS process
- Industrial temperature range available
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
Support
Support Communities
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Support Communities
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Regd. Jlink license
Folks, Purchased a RZ/A1H development board. Received a segger j-link lite debugger along with. Tried flashing the QSPI flash in the development board. The flash was programmed successfully. When we tried another customized board having R7S721001 processor and external QSPI flash, the programming gets failed. Does the ...
Mar 19, 2019