Overview
Description
This RC38312A evaluation kit is used to evaluate the RC38312 FemtoClock™ 3 ultra-low phase noise radio synchronizer, multi-frequency clock synthesizer. The RC38312/RC38112 is an ultra-low phase noise radio synchronizer, multi-frequency clock synthesizer, and digitally controlled oscillator (DCO). This flexible, low-power device outputs clocks with ultra-low in-band phase noise and spurious signals for 4G and 5G RF transceivers and with jitter below 18fs RMS for 112Gbps and 224Gbps SerDes.
Features
- Four differential clock inputs
- Twelve differential clock outputs
- Onboard EEPROM stores startup configuration data
- XIN terminal can use a laboratory signal generator or OCXO/TCXO/XO components and board
- Laboratory power supply connectors
- Serial port for configuration and register readout
Applications
Documentation
|
|
|
---|---|---|
Type | Title | Date |
Manual - Hardware | PDF 2.63 MB | |
Guide | PDF 2.23 MB | |
Schematic | XLSX 33 KB | |
Manual - Software | PDF 2.21 MB | |
Manual - Software | PDF 1.94 MB | |
5 items
|
Design & Development
Software & Tools
Related Boards & Kits
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

Support
Support Communities
Videos & Training
Learn about the FemtoClock 3 Wireless ultra-low phase noise synchronizer and jitter attenuator for 5G radio units, distribution units, and high-performance precision timing protocol.
News & Blog Posts
Blog Post
Oct 8, 2024
|