8V19N850-EVK

The evaluation kit supports electrical AC and DC measurements of the 8V19N850DNLGI, a fully integrated radio synchronizer and JESD204B/C clock jitter attenuator. The device on the board accepts any input frequency from 1Hz to 1GHz. Locked to a selected input, the device PLLs generate clock and SYSREF signals for converter reference frequency and data frame synchronization. The 8V19N850 supports two independent frequency domains: One generates transport network clocks, such as Ethernet frequencies at 4 outputs, and the other one generates radio base station clocks at 12 outputs (ADC/DAC reference clocks and SYSREF signals). Each frequency domain uses a Digital PLL (DPLL) for frequency translation, clock filtering, and jitter attenuation. The DPLLs provide a programmable bandwidth and a Digitally Controlled Oscillator (DCO) function for real-time frequency/phase adjustment.