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SMARC System for Single-Core Arm Cortex-A55 MPU

Overview

Description

This scalable SMARC 2.1 system-on-module (SoM) with AI is based on a powerful Renesas Arm® Cortex®-A55 MPU and features a complete power and timing tree for reliable operation. It offers a turn-key architecture, making it ideal for AI-enabled human machine interface (HMI) applications, such as smart industrial control terminals.

System Benefits​:

  • Linux operating system
  • Single-core configurations for low power consumption
  • Single programmable clock generator on board
  • Extensive communications interface support
  • Robust power supply with hot plug/swap support
  • Low-cost logic ICs cover the SMARC standard requirement with minimum space

Comparison

Applications

Block Diagram

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4:3 ratioSheet.78Sheet.1Sheet.2Sheet.3Sheet.4US219US219US219DDR4DDR4DDR4QSPIQSPIQSPIeMMCeMMCeMMCuSDuSDuSDEthernet PHYEthernet PHYEthernet PHYEthernet PHYEthernet PHYEthernet PHYSPDT SwitchSPDT SwitchSPDT SwitchUSB LogicUSB LogicUSB LogicBoot LogicBoot LogicBoot LogicPower LogicPower LogicPower LogicPower/Reset/Boot SWPower/Reset/Boot SoftwarePower/Reset/Boot SoftwareInterfaceInterfaceInterfaceUS 222 Carrier BoardCarrier BoardCarrier BoardSheet.28Sheet.29Sheet.30Sheet.32Sheet.33Sheet.34Sheet.36Sheet.37Sheet.38Sheet.39Sheet.40Sheet.42Sheet.43Sheet.44Sheet.45Sheet.46Sheet.47Sheet.48Sheet.49Sheet.50Sheet.51Sheet.52Sheet.53Sheet.54Sheet.55Sheet.56Sheet.57Sheet.58Sheet.59Sheet.60Sheet.61Sheet.62Sheet.63Sheet.64Sheet.65Sheet.67Sheet.68Sheet.69Sheet.70Sheet.71Sheet.72Sheet.73Sheet.74Sheet.75Sheet.76Sheet.80Sheet.82Sheet.83Sheet.84Sheet.85Sheet.86Sheet.88Sheet.89Sheet.90Sheet.91Sheet.92Sheet.93Sheet.94Sheet.95Sheet.96Sheet.98Sheet.99Sheet.100Sheet.101VTTVTTVTTVTT (0.5*VDDQ)VTT (0.5*VDDQ)VTT (0.5*VDDQ)Connector 1DDR VTT PowerDDR VTT PowerDDR VTT PowerPG00DPG00DPG00DConnector 1.119Connector 1.120Connector 1.121RTCRTCRTCLever ShifterLever ShifterLever ShifterSheet.77Sheet.136Connector 1.137Connector 1.138Connector 1.140Connector 1.141Sheet.143Sheet.144Connector 1.145Connector 1.149ClockClockClockDDR VPP (2.5V)DDR VPP (2.5V)DDR VPP (2.5V)Ethercore (1.2V)Ethercore (1.2V)Ethercore (1.2V)Vcore (1.1V)VCore (1.1V)VCore (1.1V)VDDQ (1.2V)VDDQ (1.2V)VDDQ (1.2V)D3.3V (3.3V)D3.3V (3.3V)D3.3V (3.3V)SD Card 1 (1.8V/3.3V)SD Card 1 (1.8V/3.3V)SD Card 1(1.8V/3.3V)D1.8 (1.8V)D1.8 (1.8V)D1.8 (1.8V)SD Card0 (1.8V/3.3V)SD Card0 (1.8V/3.3V)SD Card0 (1.8V/3.3V)24MHz24MHz24MHzAudioAudioAudioAudioAudioAudio RTCRTCRTC AudioAudioAudio 25MHz, 3.3V25MHz, 3.3V25MHz, 3.3V25MHz, 3.3V25MHz, 3.3V25MHz, 3.3VPMICDA9062PMICPMICLD03,4/VINLD03,4/VINLD03,4/VINLD01LD01LD01LD03.4LD03,4LD03,4Buck1Buck1Buck1Buck2Buck2Buck2Buck3Buck3Buck3Buck4Buck4Buck4LD02LD02LD02I2CI2CI2CRESETRESETRESETRTCRTCRTCBuckx/VINBuckx_VINBuckx_VINMCURZ/G2ULMCUMCUDBSCDBSCDBSCQSPIQSPIQSPISDHISDHISDHIUARTUARTUARTCANCANCANMMC*MMC*MMC* I2CI2CI2CSPISPISPII2C/UARTI2C/UARTI2C/UARTSDHI*/USB UARTSDHI*/USB UARTSDHI*/USB UARTParallel IFParallel IFParallel IFMIPI/CS12 ParallelMIPI/CS12 ParallelMIPI/CS12 ParallelSSISSISSIUSB 2.0USB 2.0USB 2.0EXTALEXTALEXTALEther MACEther MACEther MACEther MACEther MACEther MACUSB 2.0USB 2.0USB 2.0
Exiting Interactive Block Diagram

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