Features
- Packaged in 16-pin TSSOP
- Pb (lead) free package, RoHS compliant
- Clock or crystal input
- Low phase noise
- Low jitter
- Exact (0 ppm) multiplication ratios
- Reference clock output available
- Support for 256, 384, 512, and 768 times sampling rate
Description
The 661 provides synchronous clock generation for audio sampling clock rates derived from an MPEG stream, or can be used as a standalone clock source with a 27 MHz crystal. The device uses the latest PLL technology to provide excellent phase noise and long term jitter performance for superior synchronization and S/N ratio. Please contact IDT if you have a requirement for an input and output frequency not included here - we can rapidly modify this product to meet special requirements.
Support Communities
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Disable Maskable Interrupt (not FCLR I)
hi all! I am wondering if there is a command that can disable only half of the maskable interrupt. I understand that FCLR I will disable all maskable interrupts. But, I would like to know if there is a way to do only half of the maskable interrupts. Short of ...
Nov 24, 2011 -
Supporting a new touch controller chip
Hi there, I am looking to interface a larger LCD to the DK-S7G2. The display itself is no problem. The issue is that the display has a different touch controller chip (STMPE811). Digging around the touch controller framework, it looks like I would have to write a modified driver ...
Jun 9, 2016 -
ucLinux or variant on Renesas Synergy processors
Is it possible to run a linux OS on the synergy family of processors?
Jun 10, 2016
Knowledge Base
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How to run the "Suspend to RAM"
... root@h3ulcb:~# echo mem > /sys/power/state [ 27.629078] PM: suspend entry (deep) [ 27.656183] Filesystems sync: 0.023 seconds [ 27.661306] Freezing user space processes ... (elapsed 0.001 seconds) done. [ 27.669725] OOM killer disabled. [ 27.672953] Freezing remaining freezable tasks ... (elapsed 0.001 seconds ...
Mar 18, 2021
Support Communities
