Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | SOIC |
| Pkg. Code: | PSG20 |
| Lead Count (#): | 20 |
| Pkg. Dimensions (mm): | 12.8 x 7.6 x 2.34 |
| Pitch (mm): | 1.27 |
Environmental & Export Classifications
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 1 |
| ECCN (US) | |
| HTS (US) |
Product Attributes
| Lead Count (#) | 20 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tube |
| Bus Width (bits) | 8 |
| Core Voltage (V) | 5 |
| Function | Transparent Latch |
| Length (mm) | 12.8 |
| MOQ | 925 |
| Moisture Sensitivity Level (MSL) | 1 |
| Package Area (mm²) | 97.3 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 12.8 x 7.6 x 2.34 |
| Pkg. Type | SOIC |
| Published | No |
| Qty. per Carrier (#) | 37 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Speed Grade | A |
| Tape & Reel | No |
| Temp. Range (°C) | -40 to 85°C |
| Thickness (mm) | 2.34 |
| Width (mm) | 7.6 |
Resources for 74FCT373T
Description
The 74FCT373T is an octal transparent latch that has 3-state outputs and is intended for bus oriented applications. When Latch Enable (LE) is high, the flip-flops appear transparent to the data and when LE is low, the data that meets the set-up time is latched. The 74FCT373T operates at -40C to +85C. (For Mil version, see 54FCT373T)