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特長

  • Programmable Asynchronous State Machine
  • Logic and Mixed-Signal Circuits
  • Highly Versatile Macrocells
  • Read Back Protection (Read Lock)
  • Four 150mA LDO Regulators (SLG46580)
  • Two 300mA LDO Regulators (SLG46582)
  • One 600mA LDO Regulators (SLG46583)
  • I2C Interface
  • 2.5V (±8%) to 5V (±10%) Supply
  • Operating Temperature Range: -40°C to 85°C
  • RoHS-Compliant/Halogen-Free
  • Macrocells Overview
  • Four Analog Comparators (ACMP)
  • Voltage Reference (Vref) for ACMPs
  • Analog Temperature Sensor
  • Fifteen Combination Function Macrocells
    • Three Selectable DFF/Latch or 2-bit LUTs
    • Six Selectable DFF/Latch or 3-bit LUTs
    • One Selectable Pipe Delay or Ripple Counter or 3-bit LUT
    • Five 8-bit Delays/Counters or 3-bit LUTs
  • Combinatorial Logic
    • One 4-bit LUT with Two Outputs
  • Asynchronous State Machine
    • Eight States
    • Flexible Input Logic from State Transitions
  • Real-Time Clock (RTC) Binary Counter
  • Four Tri-Mode 150mA LDO Regulators
    • High Power Mode (HP Mode): 150mA output with Quiescent Current at ~80μA
    • Low Power Mode (LP Mode): 100μA output with Quiescent Current at ~5μA
    • Bypass Mode: Acts Like a Load Switch
  • Serial Communications
    • I2C Slave Protocol Interface
  • Programmable Delay with Edge Detector Output
  • Additional Logic Functions
    • 2 Deglitch Filters with Edge Detectors
  • Two Oscillators (OSC)
    • Configurable 25kHz/2MHz
    • 2kHz Low Power Oscillator
  • Eight-Byte RAM + OTP User Memory
    • RAM Memory Space that is Readable and Writable via I2C
    • User-defined Initial Values Transferred from OTP
  • Power-On Reset (POR)

説明

The SLG46580 is a small, low-power component commonly used to integrate mixed-signal functions under the control of an asynchronous state machine. The user creates the circuit design by programming the one-time programmable (OTP) non-volatile memory (NVM) to configure the interconnect logic, the I/O pins, and the macrocells of the SLG46580. This highly versatile device allows for a wide variety of functions and control logic to be designed within a very small, low-power monolithic integrated circuit.

パラメータ

属性
GPIOs (#) 9
Special Features 4x LDO, ASM (8 states), RTC
ACMP Channels (#) 4
CNT/DLY (Max) (#) 5
LUTs (Max) (#) 15
DFF (Max) (#) 9
Pipe Delay 16-stage
# of Programable Delays (#) 1
Oscillator Type Conf. OSC, LF OSC
Temperature Sensor (ch) (#) 1
Interface I2C
Memory Type OTP
Temp. Range (°C) -40 to +85°C

パッケージオプション

Pkg. Type Pkg. Dimensions (mm) Lead Count (#)
TQFN 2.0 x 3.0 20

アプリケーション・ブロック図

Smart Wireless Wall Clock Block Diagram
スマートワイヤレス壁掛け時計
コンパクトで低コストのクロック設計により、桁数のスムーズな移行と明るさの自動調整が可能です。

適用されたフィルター