Overview

Description

The 71256SA 5V CMOS SRAM is organized as 32K x 8. All bidirectional inputs and outputs of the 71256SA are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.

Features

  • Commercial (0° to 70C) and Industrial (-40° to 85C) temperature options
  • Equal access and cycle times – Commercial and Industrial: 12/15/20/25ns
  • One Chip Select plus one Output Enable pin
  • Bidirectional data inputs and outputs directly TTL-compatible
  • Low power consumption via chip deselect
  • Available in 28-pin 300-mil DIP, 300 mil SOJ and TSOP packages

Documentation

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Datasheet
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PDF508 KB日本語
Guide
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Guide
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Design & Development

Software & Tools

Software Downloads

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Models

Support