Overview

Description

The 7202 is a 1K x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

Features

  • Pin and functionally compatible with 720X family
  • Low power consumption
  • Ultra high speed—12ns access time
  • Asynchronous and simultaneous read and write
  • Fully expandable by both word depth and/or bit width
  • Status Flags: Empty, Half-Full, Full
  • Auto-retransmit capability
  • MIL-STD-883, Class B available in 28 pin (300 & 600 mil) Cerdip package
  • Industrial temperature range (–40C to +85C) is available
  • Available in 28 pin SOIC, PDIP (300 & 600 mil), and 32 pin PLCC packages

Documentation

Document title Document type
Type
Date Date
PDF 176 KB Datasheet
PDF 109 KB Application Note
PDF 113 KB Application Note
PDF 69 KB Application Note
PDF 1.29 MB End Of Life Notice
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PDF 55 KB End Of Life Notice
PDF 44 KB End Of Life Notice
PDF 123 KB Guide
PDF 157 KB Product Change Notice
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40 items

Design & Development

Software & Tools

Software Downloads

Software title Software type
Type
Date Date
PDF 1.29 MB End Of Life Notice
PDF 1.22 MB End Of Life Notice
PDF 1.15 MB End Of Life Notice
PDF 160 KB End Of Life Notice
PDF 645 KB End Of Life Notice
PDF 546 KB End Of Life Notice
PDF 548 KB End Of Life Notice
PDF 55 KB End Of Life Notice
PDF 44 KB End Of Life Notice
9 items

Models

Models

Title Type Type Date Date
ZIP 9 KB Model - IBIS
TAR 32 KB Model - SPICE
2 items

Support