The RC32504A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC or FPGA that requires several reference clocks with jitter performance less than 100fs. The RC32504A can act as a frequency synthesizer to locally generate the reference clock, a jitter attenuator to perform local clean-up and/or frequency translation of a centrally-supplied reference, a synchronous Ethernet equipment clock to perform passband filtering and clean-up of network-supplied references or as a DCO for frequency margining or OTN clock applications. 

Features

  • Jitter below 100fs RMS (10kHz to 20MHz)
  • Compliant with ITU-T G.8262 for synchronous Ethernet/OTN (EEC/OEC) and ITU-T G.8262.1 for enhanced synchronous Ethernet/OTN (eEEC/eOEC)
  • PLL core consists of fractional-feedback Analog PLL (APLL) which can optionally be steered by a Digital PLL (DPLL)
    • Operates from a 25MHz to 80MHz crystal or XO
    • APLL frequency independent of input/crystal frequency
    • Operates as a frequency synthesizer, jitter attenuator, synchronous equipment slave clock or Digitally Controlled Oscillator (DCO)
    • DPLL loop filter programmable from 0.1Hz to 12kHz
    • DCO has tuning granularity of < 1ppb
  • Programmable input buffer supports HCSL, LVDS, or two LVCMOS with no external terminations needed
    • Input frequencies: 1MHz to 800MHz (250MHz for LVCMOS)
    • Reference monitor qualifies/disqualifies input clock
  • Programmable status output
  • 4 differential/8 LVCMOS outputs
    • Any frequency from 10MHz to 1GHz (180MHz for LVCMOS)
    • Programmable output buffer supports HCSL (DC-coupled), LVDS/LVPECL/CML (AC-coupled) or two LVCMOS
    • Differential output swing is selectable: 400mV to 800mV
    • Output clock phase individually adjustable in 100ps steps
    • Output Enable input with programmable effect
  • Supports up to 1MHz I2C or up to 20MHz SPI serial processor port
  • Can configure itself automatically after reset through internal customer-definable One-Time Programmable (OTP) memory with up to four different configurations
  • 4 × 4 mm 24-VFQFPN package

tuneProduct Options

This device is factory-configurable. Try the Custom Part Configuration Utility.
Part Number Part Status Pkg. Type Lead Count (#) Temp. Range Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 24 -40 to 85°C I Yes Tray
Availability
Active VFQFPN 24 -40 to 85°C I Yes Reel
Availability

descriptionDocumentation

Title language Type Format File Size Date
Datasheets & Errata
star RC32504A Datasheet Datasheet PDF 1.66 MB
User Guides & Manuals
FemtoClock®2 GUI User Guide Manual - Software PDF 1.22 MB
FemtoClock2 Debug Guide Guide PDF 80 KB
Application Notes & White Papers
FemtoClock 2 – Generating Synchronous Ethernet (SyncE) Clocks Application Note PDF 377 KB
Frequency Margining with FemtoClock 2 Application Note PDF 129 KB
How to Make 1.2V LVCMOS from 1.8V LVCMOS Output Application Note PDF 256 KB
FemtoClock2 Python Driver Setup Application Note PDF 433 KB
RC22504A and RC32504A: Using FemtoClock 2 for High Bandwidth Jitter Attenuation Application Note PDF 353 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products Application Note PDF 108 KB
Other
RC32504A Schematic Checklist Other XLSX 482 KB
RC32504A ITU-T G.8262 and G.8262.1 Compliance Test Report Report PDF 15.98 MB
Timing Solutions Products Overview Overview PDF 906 KB
IDT Clock Generation Overview Overview PDF 1.83 MB

file_downloadDownloads

Title language Type Format File Size Date
Software
FemtoClock2 Renesas IC Toolbox GUI Installer v2.0.0 Software & Tools - Software ZIP 5.47 MB
Renesas IC Toolbox Installer v3.3.0 Software & Tools - Software ZIP 191.06 MB
Models
RC32504A IBIS Model Model - IBIS ZIP 31 KB

memoryBoards & Kits

Part Number Title Type Company
RC32504A-EVK FemtoClock®2 Evaluation Kit Evaluation Renesas