The 552-02S is a low skew, single-input to eight-output clock buffer. The device offers a dual input with pin select for switching between two clock sources. It has best in class Additive Phase Jitter of sub 50 fsec.

Features

  • Low RMS Additive Phase Jitter: 50 fs
  • Low output skew: 50 ps
  • Operating voltages of 1.8 V to 3.3 V
  • Packaged in 16-pin TSSOP and 16-pin VFQFPN
  • Input clock multiplexer simplifies clock selection
  • Output Enable pin tri-states outputs
  • Input / Output clock frequency up to 200 MHz
  • Low power CMOS technology
  • 3.3 V tolerant inputs
  • Extended temperature (-40°C to +105°C)

Product Options

Orderable Part ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
552-02SPGGI
Active TSSOP 16 I Yes Tube
Availability
552-02SPGGI8
Active TSSOP 16 I Yes Reel
Availability
552-02SCMGI
Active COL 16 I Yes Cut Tape
Availability
552-02SCMGI8
Active COL 16 I Yes Reel
Availability

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
552-02S Datasheet Datasheet PDF 561 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCNs & PDNs
PCN# : A1905-02 Adding Carsem, Malaysia as Alternate Assembly Location & Change Material Sets Product Change Notice PDF 268 KB
Downloads
552-02S IBIS Model Model - IBIS ZIP 26 KB
Other
Clock Distribution Overview 日本語 Overview PDF 217 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB