Overview

The 9FGV1005 is a member of Renesas' PhiClock™ programmable clock generator family. The 9FGV1005 provides 2 copies of a single non-spread spectrum output frequency and one copy of the crystal reference input. Two select pins allow for hardware selection of the desired configuration, or two I²C bits all easy software selection of the desired configuration. The user may configure any one of the four OTP configurations as the default when operating in I²C mode. Four unique I²C addresses are available, allowing easy I²C access to multiple components.

  • PCIe Gen1–5 compliant
  • PCIe Gen5 Common Clock jitter < 80fs RMS
  • 284fs RMS typical phase jitter at 156.25MHz (12kHz–20MHz)
  • 2 programmable output pairs plus 1 LVCMOS REF outputs
  • 1 integer output frequency per configuration
  • 1MHz–325MHz output frequency (LVDS or LP-HCSL)
  • 1MHz–200MHz output frequency (LVCMOS)
  • 1.8V to 3.3V core VDD
  • Individual 1.8V to 3.3V VDDO for each programmable output pair
  • Supports HCSL, LVDS and LVCMOS I/O standards
  • Supports AC-coupled LVPECL and CML logic – see AN-891
  • 3 × 3 mm 16-LGA packages with 50MHz integrated crystal option
  • Supported by Timing Commander™ software

Documentation

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PDF706 KB
Datasheet
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Application Note
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Datasheet
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Datasheet
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Datasheet
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Manual - Software
PDF1.50 MB
Manual - Software
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Manual - Software
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Other
PDF2.40 MB
Overview
PDF1.83 MB
Overview
PDF129 KB
Product Change Notice
PDF143 KB
Product Change Notice

Design & Development

Software Downloads

Title Type Date
ZIP3.89 MB
Software & Tools - Other

Boards & Kits

Models

Title Type Date
ZIP98 KB
Model - IBIS

Support