Overview

Description

The 9FGL0241/51 devices are 2-output 3.3V PCIe Gen1–5 clock generators. Each output has a dedicated OE# pin supporting PCIe CLKREQ# functionality. Two different spread spectrum levels, in addition to spread off, are supported. The 9FGL0241/51 supports PCIe Gen1–5 Common Clocked architectures (CC), PCIe Separate Reference no-Spread (SRNS) and Separate Reference Independent Spread (SRIS) clocking architectures.
 

Features

  • PCIe Gen1–5 CC-compliant
  • Supports PCIe SRIS and SRNS clocking
  • Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output
  • Pin-selectable SRnS 0%, CC 0% and CC/SRIS -0.5% spread
  • SMBus-selectable CC/SRIS -0.25% spread
  • One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support
  • Easy AC-coupling to other logic families, see application note AN-891.
  • Space saving 4 × 4 mm 24-VFQFPN

Documentation

Title Type Date
PDF545 KB
Datasheet
PDF1.99 MB
Application Note
PDF255 KB
Application Note
PDF480 KB
Application Note
PDF235 KB
Application Note
PDF1.90 MB
Application Note
PDF495 KB
Application Note
PDF442 KB
Application Note
PDF233 KB
Application Note
PDF160 KB
Application Note
PDF120 KB
Application Note
PDF565 KB
Application Note
PDF136 KB
Application Note
PDF121 KB
Application Note
PDF482 KB
Datasheet
PDF321 KB 简体中文
Guide
PDF2.40 MB
Overview
PDF1.83 MB
Overview
PDF120 KB
Product Change Notice
PDF119 KB
Product Change Notice
PDF728 KB
Product Change Notice
PDF726 KB
Product Change Notice
PDF5.71 MB
Product Change Notice
PDF5.61 MB
Product Change Notice
PDF127 KB
Product Change Notice
PDF983 KB
Product Change Notice
PDF583 KB
Product Change Notice
PDF23 KB
Product Change Notice
PDF31 KB
Schematic

Design & Development

Models

Models

Title Type Date
ZIP89 KB
Model - IBIS
ZIP188 KB
Model - IBIS

Support